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CY7C1461AV33-133AXI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
CY7C1461AV33
CY7C1463AV33
Document Number: 38-05356 Rev. *O Page 21 of 24
Document History Page
Document Title: CY7C1461AV33/CY7C1463AV33, 36-Mbit (1M × 36/2M × 18) Flow-Through SRAM with NoBL™ Architecture
Document Number: 38-05356
Revision ECN No. Issue Date
Orig. of
Change
Description of Change
** 254911 See ECN SYT New data sheet.
Part number changed from previous revision (New and old part number differ
by the letter “A”).
*A 300131 See ECN SYT Updated Features (Removed 150 MHz and 117 MHz frequencies related
information).
Updated Selection Guide (Removed 150 MHz and 117 MHz frequencies
related information).
Updated Electrical Characteristics (Removed 150 MHz and 117 MHz
frequencies related information).
Updated Thermal Resistance (Replaced values of
JA
and
JC
parameters
from TBD to 25.21 °C/W and 2.58 °C/W respectively for 100-pin TQFP
package).
Updated Switching Characteristics (Removed 150 MHz and 117 MHz
frequencies related information).
Updated Ordering Information (Added Pb-free information for 100-pin TQFP,
165-ball FBGA and 209-ball FBGA packages, added “Pb-free BG and BZ
packages availability” comment below the Ordering Information).
*B 320813 See ECN SYT Updated Pin Configurations (Changed H9 pin from V
SSQ
to V
SS
for 209-ball
FBGA).
Updated Electrical Characteristics (Changed the test condition for V
OL
parameter from V
DD
= Min. to V
DD
= Max., replaced the TBD’s with their
respective values for I
DD
, I
SB1
, I
SB2
, I
SB3
and I
SB4
parameters).
Updated Thermal Resistance (Replaced values of
JA
and
JC
parameters
from TBD to respective Thermal Values for 165-ball FBGA and 209-ball FBGA
Packages).
Updated Capacitance (Changed values of C
IN
, C
CLK
and C
I/O
parameters to
6.5 pF, 3 pF and 5.5 pF from 5 pF, 5 pF and 7 pF for 100-pin TQFP Package).
Updated Ordering Information (Removed “Pb-free BG packages availability”
comment below the Ordering Information).
*C 331551 See ECN SYT Updated Pin Configurations (Modified Address Expansion balls in the pinouts
for 165-ball FBGA and 209-ball FBGA Packages according to JEDEC
standards).
Updated Pin Definitions.
Updated Functional Overview (Updated ZZ Mode Electrical Characteristics
(Changed maximum value of I
DDZZ
parameter from TBD to 100 mA)).
Updated Operating Range (Added Industrial Temperature Range).
Updated Electrical Characteristics (Updated test conditions for V
OL
and V
OH
parameters, changed maximum value of I
SB2
parameter from 100 mA to
120 mA, changed maximum value of I
SB4
parameter from 110 mA to 135 mA
respectively).
Updated Capacitance (Changed values of C
IN
, C
CLK
and C
I/O
parameters to
7 pF, 7 pF and 6 pF from 5 pF, 5 pF and 7 pF for 165-ball FBGA Package).
Updated Ordering Information (By shading and unshading MPNs according to
availability).
CY7C1461AV33
CY7C1463AV33
Document Number: 38-05356 Rev. *O Page 22 of 24
*D 417547 See ECN RXU Changed status from Preliminary to Final.
Changed address of Cypress Semiconductor Corporation from “3901 North
First Street” to “198 Champion Court”.
Updated Electrical Characteristics (Updated Note 11 (Changed test condition
from V
IH
< V
DD
to
V
IH
V
DD
), changed “Input Load Current except ZZ and
MODE” to “Input Leakage Current except ZZ and MODE”, changed minimum
value of I
X
parameter (corresponding to Input current of MODE (Input = V
SS
))
from –5 A to –30 A, changed maximum value of I
X
parameter (corresponding
to Input current of MODE (Input = V
DD
)) from 30 A to 5 A respectively,
changed minimum value of I
X
parameter (corresponding to Input current of ZZ
(Input = V
SS
)) from –30 A to –5 A, changed maximum value of I
X
parameter
(corresponding to Input current of ZZ (Input = V
DD
)) from 5 A to 30 A
respectively).
Updated Ordering Information (Updated part numbers, replaced Package
Name column with Package Diagram in the Ordering Information table).
Updated Package Diagrams.
*E 473650 See ECN VKN Updated Maximum Ratings (Added the Maximum Rating for Supply Voltage
on V
DDQ
Relative to GND).
Updated TAP AC Switching Characteristics (Changed minimum value of t
TH
and t
TL
parameters from 25 ns to 20 ns, changed maximum value of t
TDOV
parameter from 5 ns to 10 ns).
Updated Ordering Information (Updated part numbers).
*F 1274733 See ECN VKN /
AESA
Updated Switching Waveforms (Updated Figure 5 (Corrected typo)).
*G 2499107 See ECN VKN /
PYRS
Updated Logic Block Diagram – CY7C1465AV33 (Corrected typo).
*H 2897278 03/22/2010 NJY Updated Ordering Information (Removed obsolete part numbers).
Updated Package Diagrams.
*I 3208774 03/29/2011 NJY Updated Ordering Information (Updated part numbers) and added Ordering
Code Definitions.
Updated Package Diagrams.
Updated to new template.
*J 3309506 07/12/2011 OSN Updated Package Diagrams.
Added Acronyms and Units of Measure.
Document History Page (continued)
Document Title: CY7C1461AV33/CY7C1463AV33, 36-Mbit (1M × 36/2M × 18) Flow-Through SRAM with NoBL™ Architecture
Document Number: 38-05356
Revision ECN No. Issue Date
Orig. of
Change
Description of Change
CY7C1461AV33
CY7C1463AV33
Document Number: 38-05356 Rev. *O Page 23 of 24
*K 3591743 05/10/2012 NJY / PRIT Updated Features (Removed CY7C1465AV33 related information, removed
165-ball FBGA package, 209-ball FBGA package related information).
Updated Functional Description (Removed CY7C1465AV33 related
information, removed the Note “For best practices recommendations, refer to
the Cypress application note System Design Guidelines on
www.cypress.com.” and its reference).
Updated Selection Guide (Removed 100 MHz frequency related information).
Removed Logic Block Diagram – CY7C1465AV33.
Updated Pin Configurations (Removed 165-ball FBGA package
(corresponding to CY7C1461AV33 and CY7C1463AV33), 209-ball FBGA
package (corresponding to CY7C1465AV33) related information).
Updated Pin Definitions (Removed JTAG related information).
Updated Functional Overview (Removed CY7C1465AV33 related
information).
Updated Truth Table (Removed CY7C1465AV33 related information).
Removed Truth Table for Read/Write (Corresponding to CY7C1465AV33).
Removed IEEE 1149.1 Serial Boundary Scan (JTAG).
Removed TAP Controller State Diagram.
Removed TAP Controller Block Diagram.
Removed TAP Timing.
Removed TAP AC Switching Characteristics.
Removed 3.3 V TAP AC Test Conditions.
Removed 3.3 V TAP AC Output Load Equivalent.
Removed 2.5 V TAP AC Test Conditions.
Removed 2.5 V TAP AC Output Load Equivalent.
Removed TAP DC Electrical Characteristics and Operating Conditions.
Removed Identification Register Definitions.
Removed Scan Register Sizes.
Removed Identification Codes.
Removed Boundary Scan Order (Corresponding to 165-ball FBGA package).
Removed Boundary Scan Order (Corresponding to 209-ball FBGA package).
Updated Electrical Characteristics (Removed 100 MHz frequency related
information).
Updated Capacitance (Removed 209-ball FBGA package related information).
Updated Thermal Resistance (Removed 209-ball FBGA package related
information).
Updated Switching Characteristics (Removed 100 MHz frequency related
information).
Updated Package Diagrams (Removed 165-ball FBGA package, 209-ball
FBGA package related information).
Replaced all instances of IO with I/O across the document.
*L 3690005 07/24/2012 PRIT No technical updates.
Completing Sunset Review.
*M 4572829 11/18/2014 PRIT Updated Functional Description:
Added “For a complete list of related documentation, click here.” at the end.
Updated Package Diagrams:
spec 51-85050 – Changed revision from *D to *E.
*N 4865506 07/30/2015 PRIT Updated to new template.
Completing Sunset Review.
*O 5373812 07/26/2016 PRIT Obsolete document.
Completing Sunset Review.
Document History Page (continued)
Document Title: CY7C1461AV33/CY7C1463AV33, 36-Mbit (1M × 36/2M × 18) Flow-Through SRAM with NoBL™ Architecture
Document Number: 38-05356
Revision ECN No. Issue Date
Orig. of
Change
Description of Change
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

CY7C1461AV33-133AXI

Mfr. #:
Buy CY7C1461AV33-133AXI
Manufacturer:
Cypress Semiconductor
Description:
SRAM 36Mb 3.3V 133Mhz 1Mx36 Flow-Thru SRAM
Lifecycle:
New from this manufacturer.
Delivery:
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