AD7303
–15–
REV. 0
LDAA #$18 0, 0, 0, 1, 1, 0, 0, 0
* SCLK and DIN enabled as outputs
LDAA #$53
STAA SPCR SPI on, Master mode, CPOL=0, CPHA=0, Clock rate =E/32
*
BSR UPDATE Update AD7303 output.
JMP #$E000 Restart.
*
UPDATE PSHX Save relevant registers.
PSHY
PSHA
*
LDAA #$00 Control Word "0, 0, 0, 0, 0, 0, 0, 0"
STAA DIN 1 Load both DAC A and DAC B DAC registers from shift register
with internal reference selected.
LDAA #$AA Data Word "1, 0, 1, 0, 1, 0, 1, 0"
STAA DIN 2
*
LDX #DIN1 Stack pointer at first first byte to send via DIN 1.
LDY #$1000 Stack pointer at on chip registers.
*
BCLR PORTC,Y $80 Assert SYNC.
TRANSFER LDAA 0,X Get BYTE to transfer via SPI.
STAA SPDR Write to DIN register to start transfer.
*
WAIT LDAA SPSR Wait for SPIF to be set to indicate that transfer has been completed.
BPL WAIT SPIF is the MSB of the SPCR. SPIF is automatically reset if in a set
state when the status register is read.
*
INX Increment counter for transfer of second byte.
CPX #DIN 2+1 16 bits transferred?
BNE TRANSFER If not, transfer second BYTE.
*Execute instruction
BSET PORTC,Y $80 Bring SYNC back high.
PULA Restore registers.
PULY
PULX
RTS Return to main program.
