AD7303
–4–
REV. 0
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Reference Input Voltage to GND . . . . –0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to GND . . . . . . . –0.3 V to V
DD
+ 0.3 V
V
OUT
A, V
OUT
B to GND . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (B Version) . . . . . . . . . . . . . –40°C to +105°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 800 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +260°C
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7303 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATIONS
(DIP, SOIC and microSOIC)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
AD7303
V
OUT
A
SCLK
DIN
SYNC
V
OUT
B
V
DD
GND
REF
PIN FUNCTION DESCRIPTIONS
Pin
No. Mnemonic Function
1V
OUT
A Analog Output Voltage from DAC A. The output amplifier swings rail to rail on its output.
2V
DD
Power Supply Input. These parts can be operated from +2.7 V to +5.5 V and should be decoupled to GND.
3 GND Ground reference point for all circuitry on the part.
4 REF External Reference Input. This can be used as the reference for both DACs, and is selected by setting the
INT/EXT bit in the control register to a logic one. The range on this reference input is 1 V to V
DD
/2. When
the internal reference is selected, this voltage will appear as an output for decoupling purposes at the REF Pin.
When using the internal reference, external voltages should not be connected to the REF Pin, see Figure 21.
5 SCLK Serial Clock. Logic Input. Data is clocked into the input shift register on the rising edge of the serial clock
input. Data can be transferred at rates up to 30 MHz.
6 DIN Serial Data Input. This device has a 16-bit shift register, 8 bits for data and 8 bits for control. Data is clocked
into the register on the rising edge of the clock input.
7
SYNC Level Triggered Control Input (active low). This is the frame synchronization signal for the input data. When
SYNC goes low, it enables the input shift register and data is transferred in on the rising edges of the following
clocks. The rising edge of the
SYNC causes the relevant registers to be updated.
8V
OUT
B Analog output voltage from DAC B. The output amplifier swings rail to rail on its output.
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 157°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
MicroSOIC Package, Power Dissipation . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
