DS1870E-010+ Datasheet DS1870E-010+ | P10-P12

DS1870

LDMOS RF Power-Amplifier Bias

Controller

10 ____________________________________________________________________

Detailed Description

The DS1870 is a dual-channel LDMOS bias controller.

It is intended to replace traditional bias control solu-

tions that are limited by a constant temperature-coeffi-

cient correction. This IC offers lookup table correction

that is programmable as a function of temperature as

well as drain supply voltage or current. The flexibility to

use a nonlinear bias correction improves efficiency sig-

nificantly. This is a direct consequence of the ability to

lower the bias current, particularly in class AB opera-

tion, since the bias correction no longer requires a con-

stant temperature coefficient. In addition, correcting the

bias as a function of drain supply voltage, or drain cur-

rent in class AB, assists in distortion reduction and gain

management.

Two outputs (W1 and W2), each controlled by a dedi-

cated two-dimensional lookup table as shown in the

functional diagram, drive two LDMOS gates. The two

degrees of freedom are temperature and either drain

supply voltage or drain current. The lookup tables are

programmed during power-amplifier assembly and

test. After calibration, the IC automatically recalls the

proper control setting for each output, based on tem-

perature and drain characteristics.

A 13-bit ADC samples and digitizes the chip tempera-

ture, V

, the drain supply voltage, and two drain cur-

rents. These digitized signals are stored in memory

ready to be accessed by the look up table controls.

The digitized values are also compared to alarm

thresholds generating high or low alarm flags. The

FAULT output can be configured to assert high based

any alarm’s assertion, or the alarms can be masked to

prevent unwanted fault assertions. The ADC readings

as well as the alarm flags and fault status are accessi-

ble through the I

C-compatible interface.

Voltage/Current Monitor Operation

The DS1870 monitors four voltages (V

, V

, I

, and

) plus the temperature in a round-robin fashion using

its 13-bit ADC. The converted voltage values are stored

in memory addresses 62h–69h as 16-bit unsigned

numbers with the ADC result left justified in the register.

The three least significant bits of the ADC result registers

are masked to zero. The round-robin time is specified by

frame

in the analog voltage-monitoring characteristics.

The default factory-calibrated values for the voltage

monitors are shown in Table 1.

To calculate the voltage measured from the register

value, first calculate the LSB weight of the 16-bit regis-

ter that is equal to the full-scale voltage span divided

by 65,528. Next, convert the hexadecimal register

value to decimal and multiply it times the LSB weight.

Example: Using the factory default V

trim, what volt-

age is measured if the V

The LSB for V

is equal to (6.553V - 0V) / 65,528 =

100.00µV. C347h is equal to 49,991 decimal, which

yields a supply voltage equal to 49,991 x 100.00µV =

4.999V. Table 2 shows more conversion examples

based on the factory trimmed ADC settings.

By using the internal gain and offset calibration regis-

ters, the +FS and -FS signal values shown in Table 1

can be modified to meet customer needs. For more

information on calibration, see the

Voltage-Monitor

Calibration

section.

Note: The method shown above for determining the

input voltage level only works when the offset register is

set to zero.

SIGNAL +FS SIGNAL

+FS

(hex)

-FS

SIGNAL

-FS

(hex)

6.553V FFF8 0V 0000

2.5V FFF8 0V 0000

0.5V FFF8 0V 0000

Table 1. Voltage-Monitor Factory Default

Calibration

SIGNAL

LSB

WEIGHT (µV)

VALUE (hex)

INPUT

VOLTAGE (V)

100.00 8080 3.29

100.00 C0F8 4.94

38.152 C000 1.875

38.152 8080 1.255

7.6303 8000 0.2500

7.6303 1328 0.0374

Table 2. Voltage-Monitor Conversion

Examples

DS1870

LDMOS RF Power-Amplifier Bias

Controller

____________________________________________________________________ 11

Temperature-Monitor Operation

The internal temperature monitor values are stored as

16-bit 2’s complement numbers at memory addresses

60h to 61h. The round-robin update time (t

frame

) for the

temperature register is the same as the voltage moni-

tors. The factory default calibration values for the tem-

perature monitor are shown in Table 3.

To convert the 2’s complement register value to the

temperature it represents, first convert the 2-byte hexa-

decimal value to a decimal value as if it is an unsigned

value, then divide the result by 256. Finally, subtract

256 if the result of the division is greater than or equal

to +128. Table 4 shows example converted values.

The offset of the temperature sensor can be adjusted

using the internal calibration registers to account for

differences between the ambient temperature at the

location of the DS1870 and the temperature of the

device it is biasing. When offsets are applied to the

temperature measurement, the value converted will be

off by a fixed value from the DS1870’s ambient temper-

ature. For more information, see the

Temperature

Monitor Offset Calibration

section.

Potentiometer Operation

Both of the DS1870’s potentiometers are 256 positions

with their high terminals connected to the high common

pin, H

COM

. The low terminals of the potentiometers are

internally shunted to GND by resistors such that the

output voltage is 3V to 5V when H

COM

is connected to

a 5V source. The internal shunt resistors and the poten-

tiometer’s end-to-end resistance feature matching tem-

perature coefficients that prevent the output voltage

from drifting over temperature.

External resistors can be placed from H

COM

to L

and/or

from L

to GND to modify the typical output voltage.

Normal Operation

During normal operation, each potentiometer’s position

is automatically adjusted to the sum of its temperature

and drain LUT values after each round of conversions.

The potentiometer setting is applied after both the base

and offset LUT values are recalled from memory. The

sum of the currently indexed values in the POT1 Temp

LUT (memory table 2) and the POT1 Drain LUT (memo-

ry table 4) control potentiometer 1. The sum of the cur-

rently indexed values in the POT2 Temp LUT (memory

table 3) and the POT2 Drain LUT (memory table 5) con-

trol potentiometer 2. In the event that two table values

are summed and the result is greater than 255 or less

than 0, the potentiometer’s position is set to 255 or 0,

respectively.

SIGNAL

+FS

SIGNAL

+FS

(hex)

-FS

SIGNAL

-FS

(hex)

Temp +127.97°C 7FF8 -128.00°C 8000

Table 3. Internal Temperature-Monitor

Factory Default Calibration

MSB

(bin)

LSB

(bin)

TEMPERATURE

(°C)

01000000 00000000 +64

01000000 00001111 +64.059

01011111 00000000 +95

11110110 00000000 -10

11011000 00000000 -40

Table 4. Temperature Conversion Values

LUT ADDRESS (hex)

CORRESPONDING

TEMPERATURE (°C)

80 ≤ -40°C

81 -38°C

82 -36°C

……

C6 +100°C

C7 ≥ +102°C

Table 5. LUT Addresses for

Corresponding Temperature Values

DS1870

LDMOS RF Power-Amplifier Bias

Controller

12 ____________________________________________________________________

The temperature tables (LUT 2 and LUT 3) are 72 bytes

each. This allows the biasing to be adjusted every 2°C

between -40°C and +102°C. Temperatures less than

-40°C or greater than +102°C use the -40°C or +102°C

values, respectively. The values in the temperature

tables are 8-bit unsigned values (0 to 255 decimal) that

allow the potentiometer to be set to any position as a

function of the temperature. The temperature LUTs

have 1°C hysteresis (Figure 1) to prevent the poten-

tiometer’s position from chattering in the event the tem-

perature remains near a LUT switching point. Table 5

shows how the DS1870 determines the temperature

tables index as a function of temperature.

The drain tables (LUT 4 and LUT5) are 64 bytes each,

and they can be indexed either by the drain voltage or

the drain current corresponding to the potentiometer.

The VD1 control bit determines if the voltage sensed on

or I

adjusts the POT1 Drain LUT, and the VD2

control bit determines if the voltage sensed on V

controls the POT2 Drain LUT. The VD1 and VD2

control bits are located in register 85h of memory table

1. The drain tables are programmed with an 8-bit

signed value (-128 to +127 decimal) that allow a rela-

tive offset from the temperature LUT values determined

by the amplifier’s drain characteristics.

The drain LUTs are indexed either by the upper half of

the V

range or the lower half of its corresponding I

range. Table 6 shows how the index is determined

based on the V

or I

values. Hysteresis equal to

0100h is also implemented on the drain monitor

(Figure 1) to ensure that voltages close to a switching

point do not cause the potentiometer position to chatter

between two LUT values. The drain LUT index values are

specified in hexadecimal because the hexadecimal val-

ues are applicable regardless of the gain and offset cali-

bration of the DS1870.

Manual Mode

During normal operation, the potentiometer position is

automatically modified once per conversion cycle

based on the ADC results. The DS1870 can either stop

the update function all together by using the B/O_en

bit, or the temperature and drain LUT indexes can be

manually controlled by using the Index_en bit. These

bits are located in the Man DAC register located in

memory table 1, byte AFh. More information about

these bits is in the

section.

Voltage-Monitor Calibration

The DS1870 can scale each analog voltage’s gain and

offset to produce the desired digital result. Each of the

inputs (V

, V

, I

) has a unique register for the

gain and offset (in memory table 1) allowing them to be

individually calibrated. Additionally, the DS1870 offers

the ability to provide a temperature offset to allow the

temperature measurement to be compensated to

account for the difference in temperature between the

DS1870 and the device it is biasing.

To scale the gain and offset of the converter for a spe-

cific input, you must first know the relationship between

the analog input and the expected digital result. The

input that would produce a digital result of all zeros is

the null value (normally this input is GND). The input

that would produce a digital result of all ones (FFF8h) is

LUT ADDRESS

(hex)

VALUE

(hex)

VALUE

(hex)

80 ≤ 8000 0000

81 8200 0200

82 8400 0400

…… …

BE FC00 7C00

BF ≥ FE00 ≥ 7E00

Table 6. LUT Addresses for V

or I

Values

9Ah

99h

98h

97h

96h

95h

2 4 6 8 10 12

TEMPERATURE (°C)

MEMORY LOCATION

9Ah

99h

98h

97h

96h

95h

AA00 AC00 AEOO B000 B200 B400

DRAIN VOLTAGE CONVERSION (HEX)

9Ah

99h

98h

97h

96h

95h

2A00 2C00 2E00 3000 3200 3400

DRAIN CURRENT CONVERSION (HEX)

INCREASING

TEMPERATURE

INCREASING

DRAIN VOLTAGE

INCREASING

DRAIN CURRENT

DECREASING

TEMPERATURE

DECREASING

DRAIN VOLTAGE

DECREASING

DRAIN CURRENT

Figure 1. LUT Hysteresis

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DS1870E-010+

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Buy DS1870E-010+

Manufacturer:

Maxim Integrated

Description:

Special Purpose Amplifiers LDMOS RF Power-Amp Bias Controller

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DS1870E-010+