7
LTC1285/LTC1288
LTC1285
V
REF
(Pin 1): Reference Input. The reference input defines
the span of the A/D converter.
IN
+
(Pin 2): Positive Analog Input.
IN
(Pin 3): Negative Analog Input.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
CS/SHDN (Pin 5): Chip Select Input. A logic low on this
input enables the LTC1285. A logic high on this input
disables and powers down the LTC1285.
D
OUT
(Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the serial
data transfer and determines conversion speed.
V
CC
(Pin 8): Power Supply Voltage. This pin provides
power to the A/D converter. It must be kept free of noise
and ripple by bypassing directly to the analog ground
plane.
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
Minimum Clock Frequency
for 0.1 LSB Error vs Temperature
TEMPERATURE (°C)
0
CLOCK FREQUENCY (kHz)
80
100
120
40
LTC1285/88 • TPC22
60
40
0
10
20 30
60 70
50
20
2
V
CC
= 2.7V
V
REF
= 2.5V
TEMPERATURE (°C)
–55
LEAKAGE CURRENT (nA)
10
100
1000
105
LTC1285/88 • TPC24
1
0.1
0.01
–15
25
65
35 125
5
45
85
V
CC
= 2.7V
V
REF
= 2.5V
ON CHANNEL
OFF CHANNEL
Input Channel Leakage Current
vs Temperature
Digital Input Logic Threshold
vs Supply Voltage
SUPPLY VOLTAGE (V)
2.5
DIGITAL INPUT LOGIC THRESHOLD VOLTAGE (V)
2.0
2.5
3.0
4.0 5.0
LTC1285/88 • TPC23
1.5
1.0
3.0 3.5
4.5 5.5 6.0
0.5
0
T
A
= 25°C
PIN FUNCTIONS
UUU
LTC1288
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1288. A logic high on this input
disables and powers down the LTC1288.
CH0 (Pin 2): Analog Input.
CH1 (Pin 3): Analog Input.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
D
IN
(Pin 5): Digital Data Input. The multiplexer address is
shifted into this input.
D
OUT
(Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the
serial data transfer and determines conversion speed.
V
CC
/V
REF
(Pin 8): Power Supply and Reference Voltage.
This pin provides power and defines the span of the A/D
converter. It must be kept free of noise and ripple by
bypassing directly to the analog ground plane.
8
LTC1285/LTC1288
BLOCK DIAGRAM
W
+
C
SAMPLE
V
CC
(V
CC
/V
REF
)
CS/SHDN
CLK
D
OUT
IN
+
(CH0)
IN
(CH1)
MICROPOWER
COMPARATOR
CAPACITIVE DAC
V
REF
GND
PIN NAMES IN PARENTHESES REFER TO THE LTC1288
LTC1285/88 • BD
(D
IN
)
BIAS AND 
SHUTDOWN CIRCUIT
SAR
SERIAL PORT
TEST CIRCUITS
Voltage Waveforms for D
OUT
Rise and Fall Times, t
r
, t
f
Load Circuit for t
dis
and t
en
D
OUT
1.4V
3k
100pF
TEST POINT
LTC1285/88 • TC01
D
OUT
V
OL
V
OH
t
r
t
f
LTC1285/88 • TC02
Voltage Waveforms for D
OUT
Delay Times, t
dDO
Load Circuit for t
dDO
, t
r
and t
f
CLK
D
OUT
V
IL
t
dDO
V
OL
V
OH
LTC1285/88 • TC03
D
OUT
3k
100pF
TEST POINT
V
CC
t
dis
WAVEFORM 2, t
en
t
dis
WAVEFORM 1
LTC1285/88 • TC04
9
LTC1285/LTC1288
TEST CIRCUITS
Voltage Waveforms for t
dis
Voltage Waveforms for t
en
D
OUT
WAVEFORM 1
(SEE NOTE 1)
V
IH
t
dis
90%
10%
D
OUT
WAVEFORM 2
(SEE NOTE 2)
CS
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
LTC1285/88 • TC05
LTC1285/88 • TC06
CS
LTC1285
1
CLK
D
OUT
t
en
B11
V
OL
2
Voltage Waveforms for t
en
1234
LTC1288
D
IN
CLK
D
OUT
START
t
en
B11
V
OL
LTC1285/88 • TC07
CS

LTC1285IS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 3V uP Smpl 12-B A/D Convs in SO-8 Packag
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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