© Semiconductor Components Industries, LLC, 2014
November, 2014 − Rev. 1
1 Publication Order Number:
NB3V8312C/D
NB3V8312C
Ultra-Low Jitter, Low Skew
1:12 LVCMOS/LVTTL Fanout
Buffer
The NB3V8312C is a high performance, low skew LVCMOS
fanout buffer which can distribute 12 ultra−low jitter clocks from an
LVCMOS/LVTTL input up to 250 MHz.
The 12 LVCMOS output pins drive 50 W series or parallel
terminated transmission lines. The outputs can also be disabled to a
high impedance (tri−stated) via the OE input, or enabled when High.
The NB3V8312C provides an enable input, CLK_EN pin, which
synchronously enables or disables the clock outputs while in the LOW
state. Since this input is internally synchronized to the input clock,
changing only when the input is LOW, potential output glitching or
runt pulse generation is eliminated.
Separate V
DD
core and V
DDO
output supplies allow the output
buffers to operate at the same supply as the V
DD
(V
DD
= V
DDO
) or
from a lower supply voltage. Compared to single−supply operation,
dual supply operation enables lower power consumption and
output−level compatibility.
The V
DD
core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V,
while the V
DDO
output supply voltage can be set to 3.3 V, 2.5 V, or
1.8 V, with the constraint that V
DD
≥ V
DDO
.
This buffer is ideally suited for various networking, telecom, server
and storage area networking, RRU LO reference distribution, medical
and test equipment applications.
Features
• Power Supply Modes:
V
DD
(Core) / V
DDO
(Outputs)
3.3 V / 3.3 V
3.3 V / 2.5 V
3.3 V / 1.8 V
2.5 V / 2.5 V
2.5 V / 1.8 V
1.8 V / 1.8 V
• 250 MHz Maximum Clock Frequency
• Accepts LVCMOS, LVTTL Clock Inputs
• LVCMOS Compatible Control Inputs
• 12 LVCMOS Clock Outputs
• Synchronous Clock Enable
• Output Enable to High Z State Control
• 150 ps Max. Skew Between Outputs
• Temp. Range −40°C to +85°C
• 32−pin LQFP and QFN Packages
• These are Pb−Free Devices
Applications
• Networking
• Telecom
• Storage Area Network
End Products
• Servers
• Routers
• Switches
LQFP−32
FA SUFFIX
CASE 873A
See detailed ordering and shipping information on page 9 o
this data sheet.
ORDERING AND MARKING INFORMATION
http://onsemi.com
Figure 1. Simplified Logic Diagram
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q
DCLK_EN
CLK
OE
GND
V
DDO
V
DD
QFN32
MN SUFFIX
CASE 488AM
32
1
R
PU
R
PU
R
PD
