NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
Recommended Substitutions:
DMOS Full-Bridge PWM Motor Driver
A3948
Date of status change: April 28, 2007
These parts are no longer in production The device should not be
purchased for new design applications. Samples are no longer available.
Discontinued Product
Data Sheet
29319.36A
3948
DMOS FULL-BRIDGE PWM
MOTOR DRIVER
Always order by complete part number:
Part Number Package R
θθ
θθ
θJA
R
θθ
θθ
θJT
A3948SB 24-pin batwing DIP 40°C/W 6°C/W
A3948SLB 24-lead batwing SOIC 77°C/W 6°C/W
Designed for pulse-width modulated (PWM) current control of dc
motors, the A3948SB and A3948SLB are capable of continuous output
currents to ±1.5 A and operating voltages to 50 V. Internal fixed off-
time PWM current-control timing circuitry can be programmed via a
serial interface to operate in slow, fast, and mixed current-decay
modes. Similar devices with outputs rated to ±2 A are available as the
A3958SB/SLB.
PHASE and ENABLE input terminals are provided for use in
controlling the speed and direction of a dc motor with externally
applied PWM-control signals. The ENABLE input can be
programmed via the serial port to PWM the bridge in fast or slow
current decay. Internal synchronous rectification control circuitry is
provided to reduce power dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with
hysteresis, and crossover-current protection. Special power-up
sequencing is not required.
The A3948SB/SLB is supplied in a choice of two power
packages, a 24-pin plastic DIP with a copper batwing tab (package
suffix ‘B’), and a 24-lead plastic SOIC with a copper batwing tab
(package suffix ‘LB’). In both cases, the power tab is at ground
potential and needs no electrical isolation.
FEATURES
±1.5 A, 50 V Continuous Output Rating
Low
r
DS(on)
Outputs
Programmable Mixed, Fast, and Slow Current-Decay Modes
Serial Interface Controls Chip Functions
Synchronous Rectification for Low Power Dissipation
Internal UVLO and Thermal-Shutdown Circuitry
Crossover-Current Protection
A3948SLB (SOIC)
SERIAL PORT
V
BB
24
23
22
21
20
19
18
17
16
15
14
13
GROUND
GROUND
RANGE
NO
CONNECTION
OUT
B
LOAD SUPPLY
SENSE
OUT
A
NO
CONNECTION
MODE
REF
V
REG
Dwg. PP-069A
1
2
3
4
5
6
7
8
9
12
11
10
9
GROUND
GROUND
CP
CP
2
CP
1
PHASE
V
DD
ENABLE
DATA
CLOCK
STROBE
LOGIC SUPPLY
θ
OSC
LOGIC
NC
NC
CHARGE PUMP
÷
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, V
BB
.................. 50 V
Output Current, I
OUT
........................ ±1.5 A
Logic Supply Voltage, V
DD
................ 7.0 V
Input Voltage, V
IN
.... -0.3 V to V
DD
+ 0.3 V
Sense Voltage, V
S
.......................... 0.55 V
Reference Voltage, V
REF
.................. 5.5 V
Package Power Dissipation (T
A
= 25°C), P
D
A3948SB ................................. 3.1 W*
A3948SLB ............................... 1.6 W*
Operating Temperature Range,
T
A
............................... -20°C to +85°C
Junction Temperature,
T
J
............................................ +150°C
Storage Temperature Range,
T
S
............................. -55°C to +150°C
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified
current rating or a junction temperature of 150°C.
* Per SEMI G42-88 Specification.
Note that the A3948SLB(SOIC) and A3948SB
(DIP) do not share a common terminal
assignment.
3948
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
2
Copyright © 2001, 2002 Allegro MicroSystems, Inc.
FUNCTIONAL BLOCK DIAGRAM
A3948SB (DIP)
Note that the A3948SLB (SOIC) and A3948SB
(DIP) do
not share a common terminal
assignment.
CHARGE PUMP
BANDGAP
V
DD
C
REG
TSD
UNDER-
VOLTAGE &
FAULT DETECT
CHARGE
PUMP
BANDGAP
REGULATOR
V
DD
V
BB
+
LOGIC
SUPPLY
V
REG
CP1
CP
CP2
LOAD
SUPPLY
GATE DRIVE
Dwg. FP-048
SLEEP
MODE
RANGE
CONTROL LOGIC
PHASE
ENABLE
SYNC RECT MODE
SYNC RECT DISABLE
PWM MODE INT
PWM MODE EXT
PROGRAMMABLE
PWM TIMER
SENSE
R
S
FIXED OFF
BLANK
DECAY
MODE
PHASE
ENABLE
CLOCK
DATA
STROBE
RANGE
REFERENCE
BUFFER &
DIVIDER
CURRENT
SENSE
ZERO
CURRENT
DETECT
OSC
OUT
A
OUT
B
REF
SERIAL
PORT
V
REF
C
S
SERIAL PORT
÷
V
BB
24
23
22
21
20
19
18
17
16
15
14
13
GROUND
GROUND
RANGE
V
REG
OUT
B
LOAD
SUPPLY
SENSE
OUT
A
MODE
REF
Dwg. PP-069-1A
1
2
3
4
5
6
7
8
9
12
11
10
9
GROUND
GROUND
CPCP
2
CP
1
PHASE
V
DD
LOGIC
SUPPLY
ENABLE
DATA
CLOCK
STROBE
θ
OSC
LOGIC
CHARGE PUMP
GROUND
GROUND

A3948SLB

Mfr. #:
Manufacturer:
Description:
IC MOTOR DRIVER 4.5V-5.5V 24SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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