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A3948SLB

P1-P3P4-P6P7-P9P10-P12P13-P13
3948
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
www.allegromicro.com
3
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 50 V, V
DD
= 5.0 V, V
SENSE
= 0.5 V,
f
PWM
< 50 kHz (unless noted otherwise)
Limits
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Output Drivers
Load Supply Voltage Range V
BB
Operating 20 – 50 V
During sleep mode 0 – 50 V
Output Leakage Current I
DSS
V
OUT
= V
BB
– <1.0 20 µA
V
OUT
= 0 V – <-1.0 -20 µA
Output On Resistance r
DS(on)
Source driver, I
OUT
= -1.5 A – 500 550 mΩ
Sink driver, I
OUT
= 1.5 A – 300 350 mΩ
Body Diode Forward Voltage V
F
Source diode, I
F
= -1.5 A – 1.0 1.3 V
Sink diode, I
F
= 1.5 A – 1.0 1.3 V
Load Supply Current I
BB
f
PWM
< 50 kHz – 4.0 7.0 mA
Charge pump on, outputs disabled – 2.0 5.0 mA
Sleep Mode – – 20 µA
Control Logic
Logic Supply Voltage Range V
DD
Operating 4.5 5.0 5.5 V
Logic Input Voltage V
IN(1)
2.0 – – V
V
IN(0)
– – 0.8 V
Logic Input Current I
IN(1)
V
IN
= 2.0 V – <1.0 20 µA
(all inputs except ENABLE)
I
IN(0)
V
IN
= 0.8 V – <-2.0 -20 µA
ENABLE Input Current I
IN(1)
V
IN
= 2.0 V – 40 100 µA
I
IN(0)
V
IN
= 0.8 V – 16 40 µA
OSC input frequency f
OSC
Operating 1.8 – 6.1 MHz
OSC input duty cycle dc
OSC
Operating 40 – 60 %
OSC input hysteresis – Operating 200 – 400 mV
Input Hysterisis – All digital inputs except OSC 50 – 100 mV
Reference Input Volt. Range V
REF
Operating 0.0 – V
DD
- 0.1 V
Reference Input Current I
REF
V
REF
= 2.5 V – – ±0.5 µA
Comparator Input Offset Volt. V
IO
V
REF
= 0 V – 0 ±5.0 mV
Continued next page …
3948
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
4
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 50 V, V
DD
= 5.0 V, V
SENSE
= 0.5 V,
f
PWM
< 50 kHz (unless noted otherwise), continued.
Limits
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Control Logic
Buffer Input Offset Volt. V
IO
–0±15 mV
Reference Divider Ratio – D14 = High 9.9 10 10.2 –
D14 = Low 4.95 5.0 5.05 –
Propagation Delay Times t
pd
PWM change to source ON – 600 – ns
PWM change to source OFF – 100 – ns
PWM change to sink ON – 600 – ns
PWM change to sink OFF – 100 – ns
Phase change to sink ON – 600 – ns
Phase change to sink OFF – 100 – ns
Phase change to source ON – 600 – ns
Phase change to source OFF – 100 – ns
Thermal Shutdown Temp. T
J
– 165 – °C
Thermal Shutdown Hysteresis ∆T
J
–15– °C
UVLO Enable Threshold UVLO Increasing V
DD
3.90 4.2 4.45 V
UVLO Hysteresis ∆UVLO 0.05 0.10 – V
Logic Supply Current I
DD
f
PWM
< 50 kHz – 6.0 10 mA
Sleep Mode, Inputs < 0.5 V – – 2.0 mA
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
3948
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
www.allegromicro.com
5
FUNCTIONAL DESCRIPTION
Serial Interface. The A3948 is controlled via a 3-wire
(clock, data, strobe) serial port. The programmable
functions allow maximum flexibility in configuring the
PWM to the motor drive requirements. The serial data is
clocked in starting with D19.
Bit Function
D0 Blank Time LSB
D1 Blank Time MSB
D2 Off Time LSB
D3 Off Time Bit 1
D4 Off Time Bit 2
D5 Off Time Bit 3
D6 Off Time MSB
D7 Fast Decay Time LSB
D8 Fast Decay Time Bit 1
D9 Fast Decay Time Bit 2
D10 Fast Decay Time MSB
D11 Sync. Rect. Mode
D12 Sync. Rect. Enable
D13 External PWM Mode
D14 Enable
D15 Phase
D16 Reference Range Select
D17 Internal PWM Mode
D18 Test Use Only
D19 Sleep Mode
D0 – D1 Blank Time. The current-sense comparator is
blanked when any output driver is switched on, according
to the table below. f
osc
is the oscillator input frequency.
D1 D0 Blank Time
0 0 4/f
osc
0 1 6/f
osc
1 0 12/f
osc
1 1 24/f
osc
D2 – D6 Fixed-Off Time. A five-bit word sets the
fixed-off time for internal PWM current control. The off
time is defined by
t
off
= (8[1 + N]/f
osc
) - 1/f
osc
where N = 0 … 31
For example, with an oscillator frequency of 4 MHz, the
off time will be adjustable from 1.75 µs to 63.75 µs in
increments of 2 µs.
D7 – D10 Fast Decay Time. A four-bit word sets the
fast-decay portion of the fixed-off time for the internal
PWM control circuitry. This will only have impact if the
mixed-decay mode is selected (via bit D17 and the MODE
input terminal). For t
fd
> t
off
, the device will effectively
operate in the fast-decay mode. The fast decay portion is
defined by
t
fd
= (8[1 + N]/f
osc
) - 1/f
osc
where N = 0 … 15
For example, with an oscillator frequency of 4 MHz, the
fast decay time will be adjustable from 1.75 µs to
31.75 µs in increments of 2 µs.
D11 Synchronous Rectification Mode. The active
mode prevents reversal of load current by turning off
synchronous rectification when a zero current level is
detected. The passive mode will allow reversal of current
but will turn off the synchronous rectifier circuit if the
load current inversion ramps up to the current limit set by
V
REF
/R
S
.
D11 Mode
0 Active
1 Passive
D12 Synchronous Rectification Enable.
D12 Synchronous Rect.
0 Disabled
1 Enabled
D13 External PWM Decay Mode. Bit D13 determines
the current-decay mode when using ENABLE chopping
for external PWM current control.
D13 Mode
0 Fast
1 Slow
D14 Enable Logic. Bit D14, in conjunction with
ENABLE, determines if the output drivers are in the
chopped (OFF)(ENABLE = D14) or ON (ENABLE ≠
D14) state.
ENABLE D14 Mode
0 0 Chopped
10On
01On
1 1 Chopped
P1-P3P4-P6P7-P9P10-P12P13-P13

A3948SLB

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IC MOTOR DRIVER 4.5V-5.5V 24SOIC
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