Data Sheet AD9363
Rev. D | Page 17 of 32
Pin No. Type
1
Mnemonic Description
D2 I VDDA1P3_RX_RF Receiver 1.3 V Supply Input. Connect to D3.
D3 I VDDA1P3_RX_TX Receiver and Transmitter 1.3 V Supply Input.
D4, E4 to E6,
F4 to F6, G4
O CTRL_OUT0, CTRL_OUT1 to
CTRL_OUT3, CTRL_OUT6 to
CTRL_OUT4, CTRL_OUT7
Control Outputs. These pins are multipurpose outputs that have programmable
functionality.
D7 I/O P0_D9/TX_D4_P Digital Data Port 0, Data Bit 9/Transmit Differential Input Bus, Data Bit 4. This is a dual
function pin. As P0_D9, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D4_P, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
D8 I/O P0_D7/TX_D3_P Digital Data Port 0, Data Bit 7/Transmit Differential Input Bus, Data Bit 3. This is a dual
function pin. As P0_D7, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D3_P, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
D9 I/O P0_D5/TX_D2_P Digital Data Port 0, Data Bit 5/Transmit Differential Input Bus, Data Bit 2. This is a dual
function pin. As P0_D5, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D2_P, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
D10 I/O P0_D3/TX_D1_P Digital Data Port 0, Data Bit 3/Transmit Differential Input Bus, Data Bit 1. This is a dual
function pin. As P0_D3, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D1_P, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
Digital Data Port 0, Data Bit 1/Transmit Differential Input Bus, Data Bit 0. This is a dual
function pin. As P0_D1, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D0_P, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
D12, F7, F9,
F11, G12, H7,
H10, K12
GND VSSD Digital Ground. Tie these pins directly to the VSSA analog ground on the PCB (one
ground plane).
E1, F1 I RX2B_P, RX2B_N Receive Channel 2 Differential B Inputs. Alternatively, each pin can be used as a
single-ended input. Unused pins must be tied to ground.
E2 I VDDA1P3_RX_LO Receive LO 1.3 V Supply Input.
E3 I VDDA1P3_TX_LO_BUFFER Transmitter LO Buffer 1.3 V Supply Input.
E7 I/O P0_D11/TX_D5_P Digital Data Port 0, Data Bit 11/Transmit Differential Input Bus, Data Bit 5. This is a
dual function pin. As P0_D11, it functions as part of the 12-bit bidirectional parallel
CMOS level Data Port 0. Alternatively, as TX_D5_P, it functions as part of the LVDS 6-
bit Tx differential input bus with internal LVDS termination.
E8 I/O P0_D8/TX_D4_N Digital Data Port 0, Data Bit 8/Transmit Differential Input Bus, Data Bit 4. This is a dual
function pin. As P0_D8, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D4_N, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
E9 I/O P0_D6/TX_D3_N Digital Data Port 0, Data Bit 6/Transmit Differential Input Bus, Data Bit 3. This is a dual
function pin. As P0_D6, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D3_N, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
E10 I/O P0_D4/TX_D2_N Digital Data Port 0, Data Bit 4/Transmit Differential Input Bus, Data Bit 2. This is a dual
function pin. As P0_D4, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D2_N, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
E11 I/O P0_D2/TX_D1_N Digital Data Port 0, Data Bit 2/Transmit Differential Input Bus, Data Bit 1. This is a dual
function pin. As P0_D2, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D1_N, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
E12 I/O P0_D0/TX_D0_N Digital Data Port 0, Data Bit 0/Transmit Differential Input Bus, Data Bit 0. This is a dual
function pin. As P0_D0, it functions as part of the 12-bit bidirectional parallel CMOS
level Data Port 0. Alternatively, as TX_D0_N, it functions as part of the LVDS 6-bit Tx
differential input bus with internal LVDS termination.
F2 I VDDA1P3_RX_VCO_LDO Receive VCO LDO 1.3 V Supply Input. Connect to E2.
