SIT3373AI-1E2-33EG644.531250X

SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Rev 1.03
Page 10 of 16 www.sitime.com
Termination Diagrams
(continued)
OUT+
OUT-
OUT+
OUT-
50
Zo = 50
Zo = 50
V
T
=VDD-2V
50
Shunt Bias Termination
network
D-
D+
D-
D+
LVPECL
Figure 12. LVPECL with DC-coupled parallel shunt load termination
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Rev 1.03
Page 11 of 16 www.sitime.com
Termination Diagrams
(continued)
LVDS:
OUT+
OUT-
OUT+
OUT-
100
Zo = 50
Zo = 50
LVDS
OUT+
OUT-
OUT+
OUT-
Figure 13. LVDS single DC termination at the load
OUT+
OUT-
100 Ω
Zo = 50Ω
Zo = 50Ω
0.1µF
0.1µF
LVDS
OUT+
OUT-
100 Ω
Figure 14. LVDS double AC termination with capacitor close to the load
OUT+
OUT-
100 Ω
Zo = 50Ω
Zo = 50Ω
LVDS
OUT+
OUT-
100 Ω
Figure 15. LVDS double DC termination
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Rev 1.03
Page 12 of 16 www.sitime.com
Termination Diagrams
(continued)
HCSL:
OUT+
OUT-
OUT+
OUT-
Zo = 50
Zo = 50
D-
D+
D-
D+
R2
R1
R1 = R2 = 33
5050
Figure 16. HCSL interface termination

SIT3373AI-1E2-33EG644.531250X

Mfr. #:
Manufacturer:
Description:
644.53125MHz, LVPECL, -40 to 85C, 25PPM, Voltage Control 150 PPM PR, 7.0x5.0, 3.3V, 250 pcs T&R
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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