7©2015 Integrated Device Technology, Inc December 11, 2015
8312 Datasheet
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= 0°C to 85°C
All parameters measured at f
MAX
unless noted otherwise.
NOTE 1: Measured from the V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltage and with equal load conditions.
Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Table 5B. AC Characteristics, V
DD
= V
DDO
= 2.5V ± 5%, T
A
= 0°C to 85°C
All parameters measured at f
MAX
unless noted otherwise.
NOTE 1: Measured from the V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltage and with equal load conditions.
Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
tp
LH
Propagation Delay, Low to High; NOTE 1 ƒ 250MHz 1.2 1.9 2.5 ns
tjit
Buffer Additive Phase Jitter, RMS; refer to
Additive Phase Jitter Section
100MHz, Integration Range:
12kHz – 20MHz
0.037 ps
tsk(o) Output Skew; NOTE 2, 5 125 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 800 ps
t
R
/ t
F
Output Rise/Fall Time; NOTE 5 20% to 80% 200 700 ps
odc Output Duty Cycle ƒ 200MHz 45 55 %
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
tp
LH
Propagation Delay, Low to High; NOTE 1 ƒ 250MHz 1.4 2.3 3.2 ns
tjit
Buffer Additive Phase Jitter, RMS; refer to
Additive Phase Jitter Section
100MHz, Integration Range:
12kHz – 20MHz
0.022 ps
tsk(o) Output Skew; NOTE 2, 5 150 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 1.1 ns
t
R
/ t
F
Output Rise/Fall Time; NOTE 5 20% to 80% 200 700 ps
odc Output Duty Cycle ƒ 150MHz 45 55 %
