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Document No. DOC-30414-2 │ www.psemi.com ©2013 Peregrine Semiconductor Corp. All rights reserved.
Product Specification
PE64909
Pin # Pin Name Description
1 RF- Negative RF port
1
2 RF- Negative RF port
1
3 GND Ground
2
4 V
DD
Power supply pin
5 SCL Serial interface clock input
6 SEN Serial interface latch enable input
7 SDA Serial interface data input
8 RF+ Positive RF port
1
9 RF+ Positive RF port
1
10 GND Ground
2
Pad GND Exposed pad: ground for proper operation
2
Table 3. Operating Ranges
Parameter Min Typ Max Unit
Supply voltage 2.30 2.75 4.80 V
Supply current (V
DD
= 2.75V) 140 200 µA
Digital input high 1.2 1.8 3.1 V
Digital input low 0 0 0.57 V
Peak operating RF voltage
2
V
P
to V
M
V
P
to RFGND
30
30
Vpk
Vpk
Operating temperature range -40 +25 +85 °C
Storage temperature range -65 +25 +150 °C
Standby current (V
DD
= 2.75V) 25 µA
RF input power (50Ω)
1
698 to 915 MHz
1710 to 1910 MHz
+34
+32
dBm
dBm
Symbol
V
DD
I
DD
I
DD
V
IH
V
IL
T
OP
T
ST
Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted
to the limits in the Operating Ranges table.
Operation between operating range maximum and
absolute maximum for extended periods may reduce
reliability.
Table 4. Absolute Maximum Ratings
Parameter/Condition Symbol Min Max Unit
ESD Voltage HBM
1
, all pins V
ESD
2000 V
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
®
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS
®
device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE64909 in the 10-lead 2x2 mm QFN package is
MSL1.
Notes: 1. Maximum Power Available from 50Ω Source. Pulsed RF input with 4620 µS
period, 50% duty cycle, measured per 3GPP TS 45.005 measured in shunt
between 50Ω ports, RF- connected to GND
2. Node voltages defined per Equivalent Circuit Model Schematic (Figure 13).
When DTC is used as a part of reactive network, impedance transformation may
cause the internal RF voltages (V
P
, V
M
) to exceed Peak Operating RF Voltage
even with specified RF Input Power Levels. For operation above about +20 dBm
(100 mW), the complete RF circuit must be simulated using actual input power
and load conditions, and internal node voltages (V
P
, V
M
in Figure 13) monitored
to not exceed 30 V
pk
Notes: 1. For optimal performance, recommend tying pins 1-2 and pins 8-9
together on PCB
2. For optimal performance, recommend tying pins 3, 10, and exposed
ground pad together on PCB
Note 1: Human Body Model (MIL-STD-883 Method 3015.7)
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