EK3L02DQ Datasheet EK3L02DQ, LIS3L02DQ, LIS3L02DQ-TR | P13-P15

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LIS3L02DQ

8 Registers Description

The device contains a set of registers which are used to control its behavior and to retrieve acceleration data.

For normal mode operation it is not necessary to program offset and gain code as they are loaded at boot.

8.1 OFFSET_X (16h)

Offset of the three axes can be changed individually. It's represented in two's complement code

8.2 OFFSET_Y (17h)

8.3 OFFSET_Z (18h)

8.4 GAIN_X (19h)

The gain/sensitivity of the three axes can be changed individually.The gain range covers 0/256.

8.5 GAIN_Y (1Ah)

8.6 GAIN_Z (1Bh)

OX7 OX6 OX5 OX4 OX3 OX2 OX1 OX0

OX7, OX0 Digital Offset Trimming for X-Axis

OY7OY6OY5OY4OY3OY2OY1OY0

DOY7, DOY0 Digital Offset Trimming for Y-Axis

OZ7OZ6OZ5OZ4OZ3OZ2OZ1OZ0

OZ7, OZ0 Digital Offset Trimming for Z-Axis

GX7GX6GX5GX4GX3GX2GX1GX0

GX7, GX0 Digital Gain Trimming for X-Axis

GY7GY6GY5GY4GY3GY2GY1GY0

GY7, GY0 Digital Gain Trimming for Y-Axis

GZ7GZ6GZ5GZ4GZ3GZ2GZ1GZ0

GZ7, GZ0 Digital Gain Trimming for Z-Axis

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LIS3L02DQ

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8.7 CTRL_REG1 (20h)

Control Register 1 and 2 allow to influence the signal chain and start up conditions as well as the commu-

nication setup.

8.8 CTRL_REG2 (21h)

PD1 PD0 DF1 DF0 ST Zen Yen Xen

PD1, PD0 Power Down Control. Default value: 00

(00: power-down mode; x1,1x: normal mode)

DF1, DF0 Decimation Factor Control. Default value: 00

(00: decimate by 128; 01: decimate by 64; 10: decimate by 32; 11: decimate by 8)

ST Self Test Enable.Default value: 0

(0: normal mode; 1: self-test enable)

Zen Z-axis enable. Default value: 1

(0:channel disabled; 1: channel enabled)

Yen Y-axis enable. Default value: 1

(0:channel disabled; 1: channel enabled)

Xen X-axis enable. Default value: 1

(0:channel disabled; 1: channel enabled)

RES BDU BLE BOOT IEN DRDY SIM DAS

RES Reserved.Default value: 0

(The Default value must not be changed)

BDU Block Data Update. Default value: 0

(0: continuous update; 1: output registers not updated until MSB and LSB reading)

BLE Big/Little Endian selection. Default value: 0

(0: little endian; 1: big endian)

BOOT Reboot memory content. Default value: 0

(0: normal mode; 1:reboot memory content)

IEN Interrupt Enable. Default value: 0

(0: data ready on RDY pad; 1: int req on RDY pad)

DRDY Enable Data-Ready generation. Default value: 0

(0:data-ready gen. disabled; 1: enable data-ready generation)

SIM SPI Serial Interface Mode selection.Default value: 0

(0: 4-wire interface; 1: 3-wire interface)

DAS Data Alignment Selection. Default value: 0

(0: 12 bit right justified; 1: 16 bit left justified)

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LIS3L02DQ

8.9 WAKE_UP_CFG (23h)

8.10 WAKE_UP_SOURCE (24h)

AOI LIR ZHIE ZLIE YHIE YLIE XHIE XLIE

AOI And/Or combination of Interrupt events. Default value: 0

(0: OR combination of interrupt events; 1: AND combination of interrupt events)

LIR Latch interrupt request into WAKE_UP_SOURCE reg with the WAKE_UP_SOURCE reg

cleared by reading WAKE_UP_ACK reg.

(0: interrupt request non latched 1: interrupt request latched)

ZHIE Enable interrupt generation on Z high event. Default value:0

(o: disable interrupt request;1: enable int req on measured accel. value higher than preset

threshold)

ZLIE Enable interrupt generation on Z low event. Default value:0