LTC3643
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OPERATION
Figure 2. Power Path Block – Power Available from Energy Storage Element
+
CHARGE
PUMP
ON/OFF
GATE
CLP
V
IN
INDIS SW BOOST
ENERGY
STORAGE
SYSTEM
LOAD
CAP
GATEDRIVE
BUCK
LOGIC
BOOST
LOGIC
INTV
CC
CHARGE/BUCK
3643 F01
1.1V
PFI
POWER SUPPLY
Boost Mode Control Loop
When the PFI voltage is above 1.1V, the input power
source is deemed to be good, and power will be delivered
from V
IN
to CAP. If there is sufficient load on CAP or if the
CAP voltage has yet to reach its final programmed value,
the step-up regulator will switch continuously to deliver
the necessary power. Under these circumstances, the
bottom switch will
turn on, thus ramping up the current
in the inductor. Once that current reaches a certain level,
which is set by the I
TH
voltage, the switch will turn off and
allow the top (synchronous) switch to turn on. The top
switch will remain on for a fixed duration (off-time) before
shutting off to allow for the cycle to repeat.
The off-time is calculated such
that in steady state, the
regulator will operate at a frequency around 1MHz. Thus,
the off-time is equal to:
t
OFFBOOST
= 1µs
V
IN
V
CAP
The boost mode control loop is compensated through
the external ITH pin, and the method of compensating the
loop will be discussed in more detail in the applications
information section.
Boost Mode Low Current Operation
Once the CAP voltage has reached its programmed voltage,
and the load is minimal, the LTC3643 will automatically
transition from continuous mode operation to Burst Mode
operation. In this mode, the I
TH
voltage will transition above
and below the sleep threshold depending on the CAP voltage.
If the CAP voltage decreases slightly below its regulation
point, the regulator will wake up from sleep, and the bottom
switch will turn on until the inductor current reaches the burst
current clamp of 800mA. Once that value is reached, the bot-
tom switch turns off and the top switch turns on for
a fixed
duration, t
OFF-BOOST
. This switching cycle will repeat until the
CAP has replenished enough to force the I
TH
voltage below
the sleep threshold. Once that happens, both switches are
turned off and the quiescent current is decreased to 400µA.
LTC3643
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OPERATION
Boost Mode Startup
The LTC3643 will begin to operate if the RUN voltage is
raised above 1.2V and V
IN
is greater than 3V. In order
to prevent conduction from the V
IN
to CAP through the
body diode of the top switch, an input disconnect switch
is placed between V
IN
and INDIS. The body diode of the
disconnect switch and that of the top switch
are opposite
in polarity in order to prevent conduction of current when
CAP is less than V
IN
. The gate of the disconnect switch
remains grounded until the regulator begins to operate.
Once started, an internal charge pump will slowly charge
up the gate of the disconnect switch and regulate that
gate voltage such that only 100mA of current is flowing
through the switch. That 100mA will thus
conduct through
the inductor between INDIS and SW, and the body diode
of the top switch to charge up the capacitor at the CAP
node. The 100mA limit is set as a way to limit the power
dissipation through the disconnect switch and the top
switch, and protect those switches from overheating.
During this period, the voltage at INDIS and SW will be
clamped at a
diode above CAP.
Once the INDIS voltage approaches V
IN
, and it is sensed
that the internal disconnect switch is fully enhanced,
an internal signal is issued to allow the top and bottom
switches to operate as needed to charge the CAP voltage
up to its programmed value.
Boost Output Over-Current/Short Operation
The current through the disconnect switch is constantly
being monitored to resolve overcurrent situations.
Once
the switch is fully enhanced, if the current through the
disconnect switch ever exceeds 4.8A, a signal is sent to
the control circuitry to keep the top switch on indefinitely
until that current level subsides.
During an output short situation, if the CAP voltage were
to ever collapse below the V
IN
voltage, then simply leaving
the top switch on to discharge the inductor current would
not
work. In these situations, if the current through the
disconnect switch ever exceeds 8A, the gate of the discon-
nect switch is immediately pulled down, thus effectively
shutting off the disconnect switch. At the same time, both
the top and bottom switches are shut off. The current in
the inductor will then conduct through the body diode of
the top switch and decrease down to 0A. From
there, the
internal charge pump will slowly charge back up the gate
of the disconnect switch and regulate the current through
the switch to 100mA, much like the case in startup.
Buck Mode Control Loop
If the PFI voltage falls below 1.15V, power will be delivered
from CAP to V
IN
. If the system load at V
IN
is high enough,
the regulator will switch continuously. In a
typical cycle,
the top switch is turned on for a fixed duration (on-time).
Once that duration expires, the top switch turns off and
the bottom switch is turned on; inductor current is allowed
to discharge until a valley current level is reached, at a
threshold set by an internally compensated I
TH
voltage.
Once that current level is reached, the bottom switch
turns off and the top
switch turns back on again and the
cycle repeats.
The on-time is once again calculated such that in steady
state, the regulator will operate at a frequency around
1MHz. Thus, the on-time is equal to:
t
ONBUCK
= 1µs
V
IN
V
CAP
The buck mode control loop is compensated by an internal
RC network and the external ITH pin is grounded through
an internal switch.
Buck Mode Low Current Operation
When V
IN
reaches the programmed regulation voltage and
a minimal load is present, the regulator will automatically
transition into Burst Mode operation. In this mode, the ITH
voltage will transition above and below the sleep threshold
depending on the
V
IN
voltage. If the V
IN
voltage decreases
slightly below its regulation point, the regulator will wake
up from sleep, and the top switch will turn on for a fixed
duration, t
ON-BUCK
. Then, the top switch will turn off and the
bottom switch will turn on until the inductor current reaches
0A. This switching cycle will repeat until the V
IN
voltage
has replenished enough
to force the I
TH
voltage below the
sleep threshold. Once that happens, both switches are
turned off and the quiescent current is decreased to 400µA.
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OPERATION
Buck Mode End of Charge Operation
The energy reservoir on CAP will continue to supply
energy to keep V
IN
at the regulation point for as long as
possible. However, at some point, if the system load at
V
IN
continues to be present, the CAP voltage will drop low
enough such that the V
IN
regulation voltage can no longer
be maintained due to minimum off-time
restrictions. The
minimum off-time restriction is present because during
every cycle, the bottom switch needs to turn on. Once
such a condition is reached, the V
IN
voltage will regulate to
roughly 93% of the CAP voltage. The switching regulator
will continue to operate in such a manner until either the
RUN voltage falls below 1.1V or the V
IN
voltage falls below
what is necessary for the
regulator to operate (typically
2.8V). When either of those situations is reached, both
the top and bottom switches are turned off, and the gate
of the disconnect switch is pulled low.
Boost/Buck Switchover Operation
The LTC3643 transitions between boost and buck modes
of operation depending on the PFI voltage. If the PFI
voltage goes above 1.2V, it is deemed that power at the
input supply
is good and the boost phase is engaged.
If the PFI voltage falls below 1.15V, it is deemed that
the input supply is no longer high enough to supply the
system load, and buck phase is engaged. The PFO pin is
an indicator pin that will display if there is an input power
fail. Connect a pull-up resistor from that pin to a known
rail (<6
V). A high on that pin indicates the input supply
is insufficient.
The transition from boost to buck mode is relatively fast
(~s) in order to prevent the voltage on V
IN
to deplete
too much before the buck regulator engages, whereas the
transition from buck to boost is somewhat slower (~20µs).
This time delay, combined with the 50mV hysteresis on the
PFI threshold voltage,
helps eliminate momentary glitches
on the PFI pin, and prevents unnecessary mode transitions.
Gate Control for External PMOS Switch
Often times, when the V
IN
voltage falls below the PFI
threshold and buck mode is engaged, it is required to have
a blocking element present to prevent back conduction of
Figure 3. PowerPath of Boost Regulator with CLP Programmability
POWER SUPPLY
CLP V
IN
INDIS
LTC3643
SW BOOST
SYSTEM
LOAD
3643 F03
CAPGATE
10mΩ
I2
I1
current into the depleted power supply. Placing a Schottky
between the power supply and CLP will achieve that result,
but would result in significant power dissipation through
the diode when the power supply is present at high load.
To mitigate this power loss, an external power PMOS de-
vice with low RDS
ON
can be used in place of the Schottky
with its gate connected to the GATE
pin of the LTC3643.
When the application transitions from boost mode to buck
mode, the GATE voltage will instantaneously get pulled
up to V
IN
, thus shutting off the external PMOS. When the
power supply becomes ready again, the GATE voltage will
get pulled low slowly with a 70µA current source, and that
voltage will be internally clamped to go no lower than 6V
below V
IN
.
Boost Mode Current Limiting
If the power supply is current limited, the LTC3643 has
the capability of limiting the input current of the boost
regulator to ensure that the cumulative current of the
boost regulator and the system load does not exceed a
programmed amount. That current limit is programmed
by the sense resistor between the CLP and V
IN
pins.
In the application example of figure 3, a
10resistor is
placed between CLP and V
IN
. The voltages across those
pins are designed to not exceed 50mV. Thus, a cumulative
5A is allowed to flow through the boost regulator (I1) and
the system load (I2). If I2 in the application is 4A, then
a maximum of 1A of current can flow through the boost
regulator. If I2 is minimal, then I1 will be limited
by the
maximum current of the boost regulator. Furthermore, if
I2 exceeds the 5A limit, the I
TH
voltage of the regulator
will get pulled low and the part will enter its sleep mode.

LTC3643IUDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Management Specialized - PMIC 2A Bidirectional Charger/ Regulator for System Power Backup
Lifecycle:
New from this manufacturer.
Delivery:
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