LTC3643
18
3643fb
For more information www.linear.com/LTC3643
APPLICATIONS INFORMATION
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, three main sources usually account
for most of the losses in LTC3643 circuits: 1) I
2
R losses,
2) switching and biasing losses, and 3) other losses.
1. I
2
R losses are calculated from the DC resistances of
the internal switches, R
SW
, and external inductor, R
L
.
In continuous mode, the average input current flows
through inductor L and front end disconnect switch
but is “chopped” between the internal top and bottom
power MOSFETs. Thus, the series resistance looking
into the SW pin is a function of both top and bottom
MOSFET R
DS(ON)
and the duty cycle (DC) as follows:
R
SW
= (R
DS(ON)TOP
)(1-DC) + (R
DS(ON)BOT
) (DC) +
R
DS(ON)BLKFET
The R
DS(ON)
for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus to obtain I
2
R losses:
I
2
R losses = I
L
2
(R
SW
+ R
L
)
2. The switching current is the sum of the MOSFET driver
and control currents. The power MOSFET driver current
results from switching the gate capacitance of the power
MOSFETs. Each time a power MOSFET gate is switched
from low to high to low again, a packet of charge dQ
moves from V
IN
to ground. The resulting dQ/dt is a
current out of V
IN
that is typically much larger than the
DC control bias current. In continuous mode, I
GATECHG
= f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of
the internal top and bottom power MOSFETs and f is
the switching frequency. The power loss is thus:
Switching Loss = I
GATECHG
• V
IN
3. Other “hidden” losses such as transition loss and cop-
per trace and internal load resistances can account for
additional efficiency degradations in the overall power
system. It is very important to include these “system”
level losses in the design of a system. Transition loss
arises from the brief amount of time the top power
MOSFET spends in the saturated region during switch
node transitions. The LTC3643 internal
power devices
switch quickly enough that these losses are not signifi-
cant compared to other sources. Other losses including
diode conduction losses during dead-time and inductor
core losses which generally account for less than 2%
total additional loss.
Thermal Conditions
In a majority of applications, the LTC3643 does not dis-
sipate much heat due to its high efficiency and low thermal
resistance of its exposed-back QFN
package. However, in
applications where the LTC3643 is running at high ambient
temperature, high V
IN
, and maximum output load current,
the heat dissipated may exceed the maximum junction
temperature of the part. If the junction temperature reaches
approximately 160°C, both power switches will be turned
off until the temperature drops about 15°C cooler.
To avoid the LTC3643 from exceeding the maximum
junction temperature, some thermal
analysis must be done.
The goal of the thermal analysis is to determine whether
the power dissipated exceeds the maximum junction
temperature of the part. The temperature rise is given by:
t
RISE
= P
D
• θ
JA
As an example, consider the case when the LTC3643 is
used in applications where V
IN
= 5V, I
L
= 2A, and V
CAP
=
40V. The equivalent power MOSFET resistance R
SW
is:
R
SW
= R
DS(ON)TOP
•
V
IN
V
CAP
+R
DS(ON)BOT
• 1–
V
IN
V
CAP
⎛
⎝
⎜
⎞
⎠
⎟
+ R
DS(ON)BLKFET
= 150mΩ•
5V
40V
+ 75mΩ• 1–
5V
40V
⎛
⎝
⎜
⎞
⎠
⎟
+ 50mΩ
Typically, the current drawn from INTV
CC
will be 10mA.
Therefore, the total power dissipated by the part is:
P
D
= I
OUT
•R
SW
+ V
IN
•I
INTVCC
= 4A
2
•134mΩ + 5V •10mA
