XRD87L99 xrxr
LOW POWER, 2 MSPS, 10-BIT, A/D CONVERTER WITH 8-CHANNEL MUX
REV. 1.0.0
9
FIGURE 3. XRD87L99 TIMING DIAGRAM
THEORY OF OPERATION
1.0 ANALOG-TO-DIGITAL CONVERSION
The XRD87L99 converts analog voltages into 1024
digital codes by encoding the outputs of coarse and
fine comparators. Digital logic is used to generate the
overflow bit. The conversion is synchronous with the
clock and it is accomplished in 2 clock periods.
The reference resistance ladder is a series of resis-
tors. The fine comparators use a patented interpola-
tion circuit to generate the equivalent of 1024 evenly
spaced reference voltages between V
REF(-)
and
V
REF(+)
.
The clock signal generates the two internal phases,
φB (CLK high) and φS (CLK low = sample) (See Fig-
ure 1). The rising edge of the CLK input marks the
end of the sampling phase (
φS). Internal delay of the
clock circuitry will delay the actual instant when
φS
disconnects the latches from the comparators. This
delay is called aperture delay (t
AP
).
The coarse comparators make the first pass conver-
sion and selects a ladder range for the fine compara-
tors. The fine comparators are connected to the se-
lected range during the next
φB phase.
F
IGURE 4. XRD87L99 COMPARATORS
A
IN
Sampling, Ladder Sampling, and Conversion
Timing
Figure 3 shows this relationship as a timing chart. A
IN
sampling, ladder sampling and output data relation-
ships are shown for the general case where the levels
which drive the ladder need to change for each sam-
pled A
IN
time point. The ladder is referenced for both
last A
IN
sample and next A
IN
sample at the same
time. If the ladder's levels change by more than 1
LSB, one of the samples must be discarded. Also
note that the clock low period for the discarded A
IN
can be reduced to the minimum t
S
time.
Auto
Balance
CLOCK
Data
Analog
Input
Sample
N-1
Sample
N
Sample
N+1
Auto
Balance
N-1
T
S
V
IH
V
IL
V
OH
V
OL
t
F
t
B
t
R
t
S
t
DL
t
HLD
t
AP
φ
S
B
φ
B
φ
S
φ
Latch
Ref
Ladder
COARSE COMPARATOR
S
S
B
B
φ
φ
φ
φ
Latch
Selected
FINE COMPARATOR
VIN
VIN
VTAP
VTAP
