ADP5587ACBZ-R7 Datasheet ADP5587ACPZ-1-R7, ADP5587ACPZ-R7, ADP5587ACBZ-R7 | P10-P12

Data Sheet ADP5587

Rev. D | Page 9 of 24

To prevent glitches or narrow press times registering as valid

key presses, the key scanner requires the key to be pressed for

two scan cycles. The key scanner has a sampling period of 25 ms;

therefore, the key must be pressed and held for at least 25 ms to

scanner continues to sample every 25 ms. If a pressed key is

released for 25 ms or greater, the state machine sets the

appropriate key number in the key event status register with the

key-pressed bits cleared in the order detected. Because the

release of a key is not necessarily in sync with the key scan

sampling period, it may take between 25 ms and 50 ms for a key

to register as released. After the key is registered as released, the

key scanner returns to idle mode. Figure 10 shows the row and

column pins connected to a typical 10 × 8, 80-switch keypad

matrix.

KEYPAD SCAN AND DECODE

D0_PULL

R7 R6 R5 R4 R3 R2 R1

C0 C1 C2 C3 C4 C5 C6 C7 C9C8

10 × 8 KEYPAD MATRIX

D1_PULL

D2_PULL

D3_PULL

D4_PULL

D5_PULL

D6_PULL

D7_PULL

08612-006

NOTES:

1. Dx_PULL STANDS FOR GPIO PULL-UP.

Figure 10. Keypad Decode Configuration

Key Event Tracking

The 10 key event registers are set to act as a FIFO, meaning that

reading any of the 10 key event registers yields the key events in

the order the keys were pressed and released.

Tracking of key events is done with the help of the key event

counter (the KEC field in Register 0x03) and the FIFO/key

event registers (Register 0x04 through Register 0x0D). The KEC

count increases as keys are pressed and released; up to 10 events

can be logged in the counter. The FIFO/key event registers, on

the other hand, display the key events and their status (pressed

or released) as they are read out of the FIFO. The FIFO registers

contain eight bits, with the MSB dedicated as the status bit (1

indicates a press and 0 indicates a release); the remaining seven

bits display the binary representation of the keys that are pressed

or released.

The first read of any of the FIFO registers displays the first

event that happened and its status. Subsequent reads of the

same register replace the register data with the next event that

happens. If tracking of all the events is important, it is best to

use a single register per event. After all the events in the FIFO

are read, reading of any of the event registers yields a zero value.

Table 10 and Table 11 show the event sequences as they are

logged in and read from the FIFO. The 10 FIFO registers are

labeled A through J, and the keys are labeled A0 through J7.

Table 10. Example of Event Sequence

Key Pressed/Released Status Key Event Counter

A0 Pressed 1

Pressed

A0 Released 3

C2 Pressed 4

B1 Released 5

D3 Pressed 6

C2 Released 7

E4 Pressed 8

E4 Released 9

D3 Released 10

Table 11. Interpretation of FIFO Event Reading

Key Event

Counter

Key Event

Read

Key Event Reg-

ister Content

(Binary)

Key Event

Interpretation

10 N/A N/A N/A

9 D 1 0000001 Key A0 pressed

8 E 1 0001100 Key B1 pressed

7 C 0 0000001 Key A0 released

6 F 1 0010111 Key C2 pressed

5 G 0 0001100 Key B1 released

4 A 1 0100010 Key D3 pressed

3 B 0 0010111 Key C2 released

2 H 1 0101101 Key E4 pressed

0 0101101

Key E4 released

0 I 0 0100010 Key D3 released

The MSB indicates a key press or key release in the key event register: 1 = key

press; 0 = key release.

Key Event Overflow

The ADP5587 is equipped with an overflow feature to handle

key events beyond the FIFO capacity. When all events are filled, any

additional events set the OVR_FLOW_INT bit in Register 0x02;

if the OVR_FLOW_IEN bit in Register 0x01 is set, the host

processor is also interrupted when overflow occurs. When the

FIFO is not full, new events are added as the last events.

The OVR_FLOW_M bit in Register 0x01 sets the mode of

operation during overflows. Clearing the OVR_FLOW_M bit

causes new incoming events to be discarded, and setting this bit

rolls over and overwrites old data with new data starting at the

first event.

ADP5587 Data Sheet

Rev. D | Page 10 of 24

Auto-Increment

The ADP5587 features automatic increment during I

C read

access, which allows the user to increment the address pointer

without the need to send a read command for subsequent

addresses. This minimizes processor intervention and, therefore,

saves processor bandwidth and current drain. Bit 7 of Register 0x01

must be set to initiate auto-increment (see Figure 17 for the full

write and read sequence).

Key Event Interrupt

On a key event (KE) interrupt, the processor reads the interrupt

status register to determine the cause of the interrupt. If the

KE_INT bit in Register 0x02 is set, the processor reads the key

event count from the KEC [3:0] field in Register 0x03 to determine

the number of events. After reading all the events from the

FIFO, it then reads the KEC field again (in Register 0x03) to

make sure that no new events have come in. After all the events

are read, the KEC field is decremented to zero (KEC = 0), and

the KE_INT bit can be cleared by writing a 1 to it. Both key

presses and key releases are capable of generating key event

interrupts. The KE_INT bit cannot be cleared, and the

INT

cannot be deasserted, until the FIFO is cleared of all events.

KEYPAD MODE

KEC

REG. 0x1D

THROUGH REG. 0x1F

REG. 0x03

READ KE(s) TO CLEAR

INT DRIVE

KE_INT

REG. 0x02

WRITE 1 TO CLEAR

KE_IEN

REG. 0x01

AND

08612-007

Figure 11. Key Event Interrupt Generation

START

MASK TIMER = 0

KEY PRESS

DETECTED

YES

GENERATE

KE INTERRUPT

START MASK TIMER

MASK TIMER

EXPIRES

MASK TIMER

EXPIRES

GENERATE

KEYLOCK INTERRUPT

FIRST UNLOCK

KEY DETECTED

SECOND UNLOCK

KEY DETECTED

START UNLOCK1 TO UNLOCK2

UNLOCK1

UNLOCK2

TIMER EXPIRES

KEY PRESS

DETECTED

START UNLOCK1 TO UNLOCK2

FIRST UNLOCK

KEY DETECTED

GENERATE

KEYLOCK INTERRUPT

SECOND UNLOCK

KEY DETECTED

UNLOCK1 TO

UNLOCK2

TIMER EXPIRES

08612-008

Figure 12. Keypad Lock Interrupt Mask Timer Flowchart

Data Sheet ADP5587

Rev. D | Page 11 of 24

Keypad Lock/Unlock Feature

The ADP5587 has a locking feature that allows the user to lock

the keypad or GPIs (configured to be part of the event table).

When enabled, the keypad lock can prevent generation of key

event interrupts and prevent key events from being recorded

in the key event table. This feature comprises the Unlock Key 1

and Unlock Key 2 registers (Register 0x0F and Register 0x10,

respectively), the keypad lock interrupt mask and keypad

unlock timers (Register 0x0E), and the LCK1, LCK2, and

keylock enable (K_LCK_EN) bits (Register 0x03).

The unlock keys can be programmed with any value of the keys

in the keypad matrix or any GPI event values that are part of the

key event table. When the keypad lock interrupt mask timer is

enabled, the user must press two specific keys before a keylock

interrupt is generated or keypad events are recorded. After the

keypad is locked (set Bit 6, Register 0x03, to enable the lock),

the first time that the user presses any key, a key event interrupt

is generated. No additional interrupt is generated unless both

unlock key sequences are correct.

If the correct unlock keys are not pressed before the mask timer

expires, the state machine starts over. The first key event inter-

rupt is generated to allow the software to see that the user has

pressed a key so that the host can turn on the LCD and display

the unlock message. The host then reads the lock status register

to see if the keypad is unlocked. After the first key event

interrupt, the state machine does not interrupt the processor

again unless the correct sequence is keyed. The state machine is

reset if the correct sequences are not keyed before the keypad

lock interrupt mask timer expires.

The state of the keypad lock interrupt mask bit (Register 0x01,

Bit 2) in the configuration register determines whether the

interrupt pin is asserted when the keylock interrupt status bit

(Register 0x02, Bit 2) is set. Setting the keylock interrupt mask

bit causes the

INT

pin to be asserted when the keylock interrupt

status bit is set in Register 0x02; clearing that bit masks the

interrupt, causing the interrupt pin not to respond to the keylock

interrupt status bit. The mask interrupt timer should be set for

the time that it takes for the LCD to dim or turn off so that, if a

key is pressed, the backlight is set to bright mode again or reset

to turn on the LCD.

When the unlock mask interrupt timer equals 0, only the

correct unlock sequence can generate an interrupt. Disabling

the unlock mask interrupt timer allows the processor to remain

undisturbed for situations in which the user, for example, has

the phone in a pocket or purse and the keys are constantly

pressed. The flowchart in Figure 11 shows the interaction of

interrupt enable, key event counter, key event interrupt status,

and interrupt generation.

KEY EVENT INTERRUPT

KEYLOCK INTERRUPT

OVERFLOW INTERRUPT

GPIO INTERRUPT

INT

INTERRUPT CONFIGURATION

OVR_FLOW_

IEN

K_LCK_IM GPI_IEN KE_IEN

GPIEM_

CFG

KEYPAD LOCK INTERRUPT MASK TIMER

K_LCK_EN

INT

LOGIC

08612-009

Figure 13.

INT

Pin Drive

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P25

ADP5587ACBZ-R7

Mfr. #:

Buy ADP5587ACBZ-R7

Manufacturer:

Analog Devices Inc.

Description:

Interface - I/O Expanders QWERTY Keypad Cntlr

Lifecycle:

New from this manufacturer.

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ADP5587ACBZ-R7

ADP5587ACBZ-R7

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