CS48DV2B Data Sheet
32-bit Audio DSP for Dedicated Dolby Volume and Audistry by Dolby
4 Copyright 2009 Cirrus Logic DS875F2
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List of Figures
Figure 1. RESET Timing ......................................................................................................................................... 12
Figure 2. XTI Timing ............................................................................................................................................... 12
Figure 3. Serial Control Port - SPI Slave Mode Timing........................................................................................... 14
Figure 4. Serial Control Port - SPI Master Mode Timing......................................................................................... 15
Figure 5. Serial Control Port - I
2
C Slave Mode Timing ........................................................................................... 16
Figure 6. Serial Control Port - I
2
C Master Mode Timing ......................................................................................... 17
Figure 7. Digital Audio Input (DAI) Port Timing Diagram ........................................................................................ 18
Figure 8. Direct Stream Digital - Serial Audio Input Timing..................................................................................... 18
Figure 9. Digital Audio Output Port Timing, Master Mode....................................................................................... 20
Figure 10. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK)............................................ 20
Figure 11. CS48DV2B 48-Pin LQFP Pinout Diagram............................................................................................. 23
Figure 12. 48-Pin LQFP Package Drawing............................................................................................................. 24
List of Tables
Table 1. CS48DV2B DSP Related Documentation................................................................................................5
Table 2. Device and Firmware Selection Guide.....................................................................................................7
Table 3. Ordering Information ..............................................................................................................................21
Table 4. Environmental, Manufacturing, & Handling Information.........................................................................22
CS48DV2B Data Sheet
32-bit Audio DSP for Dedicated Dolby Volume and Audistry by Dolby
DS875F2 Copyright 2009 Cirrus Logic 5
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1. Documentation Strategy
The CS48DV2B Data Sheet describes CS48DV2B multichannel audio processors. This document
should be used in conjunction with the following documents when evaluating or designing a system
around the CS48DV2B processors.
The scope of the CS48DV2B Data Sheet is primarily the hardware specifications of the CS48DV2B
devices. This includes hardware functionality, characteristic data, pinout, and packaging information.
The intended audience for the CS48DV2B Data Sheet is the system PCB designer, MCU
programmer, and the quality control engineer.
2. Overview
The CS48DV2B DSP is designed to provide high-performance post-processing and mixing of digital
audio. The dual clock domain provided on the PCM inputs allows for the mixing of audio streams with
different sampling frequencies. The low-power standby preserves battery life for applications which
are always on, but not necessarily processing audio, such as automotive audio systems.
The CS48DV2B supports dual input clock domains and dual audio processing paths. The
CS48DV2B is available in a 48-pin QFP package. Please refer to Table 2 on page 7 for the input,
output, firmware features of each device.
2.1 Licensing
Licenses are required for all of the 3
rd
party audio processing algorithms listed in Section 3. Please
contact your local Cirrus Logic Sales representative for more information.
Table 1. CS48DV2B DSP Related Documentation
Document Name Description
CS48DV2B Data Sheet This document
CS485xx Family Hardware User’s Manual
Includes detailed system design information including
Typical Connection Diagrams, Boot-Procedures, Pin
Descriptions, etc.
AN298 - CS485xx Family Firmware User’s Manual
Includes detailed firmware design information
including signal processing flow diagrams and control
API information
DSP Composer User’s Manual
Includes detailed configuration and usage
information for the GUI development tool.
AN298VPMA,Audistry
®
by Dolby
®”
Describes API used to control the Audistry firmware
module.
AN298PPMN, Dolby® Volume Firmware User’s
Manual for the CS48DV2x Family
Describes API used to control the Dolby Volume
firmware module.
CS48DV2B Data Sheet
32-bit Audio DSP for Dedicated Dolby Volume and Audistry by Dolby
6 Copyright 2009 Cirrus Logic DS875F2
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3. Code Overlays
The suite of software available for the CS48DV2B DSP consists of an operating system (OS) and a
library of overlays. The overlays have been divided into three main groups called Matrix-processors,
Virtualizer-processors, and Post-processors. All software components are defined below:
1. OS/Kernel - Encompasses all non-audio processing tasks, including loading data from external
memory, processing host messages, calling audio-processing subroutines, error concealment,
etc.
2. Matrix-processor- Any Module that performs a matrix decode on PCM data to produce more
output channels than input channels (2Ön channels). Examples are Dolby
®
Pro Logic
®
IIx and
DTS Neo:6
. Generally speaking, these modules increase the number of valid channels in the
audio I/O buffer.
3. Virtualizer-processor - Any module that encodes PCM data into fewer output channels than
input channels (nÖ2 channels) with the effect of providing “phantom” speakers to represent the
physical audio channels that were eliminated. Examples are Dolby Headphone
®
and Dolby
®
Virtual Speaker
®
. Generally speaking, these modules reduce the number of valid channels in the
audio I/O buffer.
4. Post-processors - Any module that processes audio I/O buffer PCM data in-place after the
matrix- or virtualizer-processors. Examples are the Dolby Volume and Audistry by Dolby
firmware, bass management, audio manager, tone control, EQ, delay, and customer-specific
effects
The bulk of each overlay is stored in ROM within the CS48DV2B, but a small image is required to
configure the overlays and boot the DSP. This small image can either be stored in an external serial
FLASH/EEPROM, or downloaded via a host controller through the
SPI
/I
2
C
®
serial port.
The overlay structure reduces the time required to reconfigure the DSP when a processing change is
requested. Each overlay can be reloaded independently without disturbing the other overlays. For
example, when a new matrix-processor is selected, the OS, virtualizer-, and post-processors do not
need to be reloaded — only the new matrix-processor. This fact is also true for the other overlays.
Table 2 lists the firmware available based on device selection. Please refer to AN298, CS485xx
Firmware User’s Manual for the latest listing of application codes and Cirrus Framework
modules
available.

CS48DV2B-CQZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Audio DSPs I/C 12 Ch Audio Enhancement Processr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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