OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

L9953LXPTR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P35
L9953LXP Functional description of the SPI
Doc ID 16185 Rev 3 25/35
content of the selected status register into the data out shift register. Each subsequent
falling edge of the CLK will shift the next bit out.
4.5 Serial clock (CLK)
The CLK input is used to synchronize the input and output serial bit streams. The data input
(DI) is sampled at the rising edge of the CLK and the data output (DO) will change with the
falling edge of the CLK signal.
4.6 Input data register
The device has two input registers. The first bit (bit 0) at the DI-input is used to select one of
the two Input Registers. All bits are first shifted into an input shift register. After the rising
edge of CSN the contents of the input shift register will be written to the selected Input Data
Register only if a frame of exact 24 data bits are detected. Depending on bit 0 the contents
of the selected status register will be transferred to DO during the current communication
frame. Bit 1-17 controls the behavior of the corresponding driver.
If bit 23 is zero, the device will go into the standby-mode. The bits 18 and 19 are used to
control the current monitor multiplexer. Bit 22 is used to reset all status bits in both status
registers. The bits in the status registers will be cleared after the current communication
frame (rising edge of CSN).
4.7 Status register
This devices uses two status registers to store and to monitor the state of the device. Bit 0 is
used as a fault bit and is a logical-NOR combination of bits 1-22 in both status registers. The
state of this bit can be polled by the microcontroller without the need of a full SPI
communication cycle. If one of the over-current bits is set, the corresponding driver will be
disabled. If the over-current recovery bit of the output is not set the microcontroller has to
clear the over-current bit to enable the driver. If the thermal shutdown bit is set, all drivers
will go into a high impedance state. Again the microcontroller has to clear the bit to enable
the drivers.
Functional description of the SPI L9953LXP
26/35 Doc ID 16185 Rev 3
4.8 SPI - input data and status registers
Table 18. SPI - input data and status registers 0
Bit
Input register 0 (write) Status register 0 (read)
Name Comment Name Comment
23 Enable bit
If enable bit is set the
device will be switched in
active mode. If enable bit
is cleared the device go
into standby mode and all
bits are cleared. After
power-on reset device
starts in standby mode.
Always 1
A broken VCC-or SPI-
connection of the L9953LXP
can be detected by the
microcontroller, because all 24
bits low or high is not a valid
frame.
22 Reset bit
If reset bit is set both
status registers will be
cleared after rising edge of
CSN input.
V
S
overvoltage
In case of an overvoltage or
undervoltage event the
corresponding bit is set and
the outputs are deactivated. If
VS voltage recovers to normal
operating conditions outputs
are reactivated automatically
(if Bit 20 of status register 0 is
not set).
21
OC recovery
duty cycle
This bit defines in
combination with the over-
current recovery bit (Input
register 1) the duty cycle
in over current condition of
an activated driver.
V
S
undervoltage
0: 12% 1: 25%
20
Overvoltage/
undervoltage
recovery
disable
If this bit is set the
microcontroller has to
clear the status register
after
undervoltage/overvoltage
event to enable the
outputs.
Thermal
shutdown
In case of a thermal shutdown
all outputs are switched off.
The microcontroller has to
clear the TSD bit by setting the
reset bit to reactivate the
outputs.
19
Current monitor
select bits
Depending on
combination of bit 18 and
19 the current image
(1/10.000) of the selected
HS-output will be multi-
plexed to the CM output:
Temperature
warning
This TW bit is for information
purpose only. It can be used
for a thermal management by
the microcontroller to avoid a
thermal shutdown.
18
Bit
19
Bit
18
Output
Not ready bit
After switching the device from
standby mode to active mode
an internal timer is started to
allow charge pump to settle
before the outputs can be
activated. This bit is cleared
automatically after start up
time has finished. Since this bit
is controlled by internal clock it
can be used for synchronizing
testing events (e.g. measuring
filter times).
00 OUT8
10 OUT1
01 OUT5
11 OUT4
L9953LXP Functional description of the SPI
Doc ID 16185 Rev 3 27/35
17
OUT8 – HS
on/off
If a bit is set the selected
output driver is switched
On. If the corresponding
PWM enable bit is set
(input register 1) the driver
is only activated if PWM1
(PWM2) input signal is
high. The outputs of
OUT1-OUT5 are half
bridges. If the bits of HS-
and LS-driver of the same
half bridge are set, the
internal logic prevents that
both drivers of this output
stage can be switched on
simultaneously in order to
avoid a high internal
current from VS to GND.
OUT8 – HS
over-current
In case of an over-current
event the corresponding status
bit is set and the output driver
is disabled. If the over-current
recovery enable bit is set
(input register 1) the output will
be automatically reactivated
after a delay time resulting in a
PWM modulated current with a
programmable duty cycle (bit
21).
If the over-current recovery bit
is not set the microcontroller
has to clear the over-current
bit (reset bit) to reactivate the
output driver.
16 x (don’t care) 0
15
OUT7 – HS
on/off
OUT7 – HS
over-current
14
OUT6 – HS
on/off
OUT6 – HS
over-current
13 x (don’t care) 0
12 x (don’t care) 0
11 x (don’t care)
10
OUT5 – HS
on/off
OUT5 – HS
over-current
9
OUT5 – LS
on/off
OUT5 – LS
over-current
8
OUT4 – HS
on/off
OUT4 – HS
over-current
7
OUT4 – LS
on/off
OUT4 – LS
over-current
6
OUT3 – HS
on/off
OUT3 – HS
over-current
5
OUT3 – LS
on/off
OUT3 – LS
over-current
4
OUT2 – HS
on/off
OUT2 – HS
over-current
3
OUT2 – LS
on/off
OUT2 – LS
over-current
2
OUT1 – HS
on/off
OUT1 – HS
over-current
1
OUT1 – LS
on/off
OUT1 – LS
over-current
0 0 No error bit
A logical NOR-combination of
all bits 1 to 22 in both status
registers.
Table 18. SPI - input data and status registers 0 (continued)
Bit
Input register 0 (write) Status register 0 (read)
Name Comment Name Comment
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P35

L9953LXPTR

Mfr. #:
Buy L9953LXPTR
Manufacturer:
STMicroelectronics
Description:
IC DVR DOOR ACTUATOR POWERSSO36
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet