SL28610
........................DOC #: SP-AP-0078 (Rev. 1.0) Page 7 of 23
Byte 6: Control Register 6
Bit @Pup Name Description
7 HW PLL2 N DIV 8 This is a read only register of the multiplier used for PLL2 M and N Dividers
HW= Read Only
6 HW PLL2 N DIV 9
5 HW PLL2 M DIV 5
4 HW PLL2 M DIV 4
3 HW PLL2 M DIV 3
2 HW PLL2 M DIV 2
1 HW PLL2 M DIV 1
0 HW PLL2 M DIV 0
Byte 7: Control Register 7
Bit @Pup Name Description
7 HW PLL2 N DIV 7 This is a read only register of the multiplier used for PLL2 N Divider
HW= Read Only
6 HW PLL2 N DIV 6
5 HW PLL2 N DIV 5
4 HW PLL2 N DIV 4
3 HW PLL2 N DIV 3
2 HW PLL2 N DIV 2
1 HW PLL2 N DIV 1
0 HW PLL2 N DIV 0
Byte 8: Control Register 8
Bit @Pup Name Description
7 HW PLL3 M DIV 7 This is a read only register of the multiplier used for PLL3 M Divider
HW= Read Only
6 HW PLL3 M DIV 6
5 HW PLL3 M DIV 5
4 HW PLL3 M DIV 4
3 HW PLL3 M DIV 3
2 HW PLL3 M DIV 2
1 HW PLL3 M DIV 1
0 HW PLL3 M DIV 0
Byte 9: Control Register 9
Bit @Pup Name Description
7 HW PLL3 N DIV 7 This is a read only register of the multiplier used for PLL3 N Divider
HW= Read Only
6 HW PLL3 N DIV 6
5 HW PLL3 N DIV 5
4 HW PLL3 N DIV 4
3 HW PLL3 N DIV 3
2 HW PLL3 N DIV 2
1 HW PLL3 N DIV 1
0 HW PLL3 N DIV 0
SL28610
........................DOC #: SP-AP-0078 (Rev. 1.0) Page 8 of 23
Byte 10: Control Register 10
Bit @Pup Name Description
7 HW FSB FSB status bit, CPU Frequency Select Bit, read only
6 HW FSC FSC status bit, CPU Frequency Select Bit, read only
5 HW OE#_0 OE#_0 status bit, PCIe0 enable status, read only
0 = PCIe0 disabled, 1 = PCIe0 enabled
4 HW OE#_1 OE#_0 status bit, PCIe1 enable status, read only
0 = PCIe1 disabled, 1 = PCIe1 enabled
3 HW OE#_2 OE#_0 status bit, PCIe2 enable status, read only
0 = PCIe2 disabled, 1 = PCIe2 enabled
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 11: Control Register 11
Bit @Pup Name Description
7 1 Vendor ID bit 3 Vendor ID Bit 3
6 0 Vendor ID bit 2 Vendor ID Bit 2
5 0 Vendor ID bit 1 Vendor ID Bit 1
4 0 Vendor ID bit 0 Vendor ID Bit 0
3 0 Rev Code Bit 3 Revision Code Bit 3
2 0 Rev Code Bit 2 Revision Code Bit 2
1 0 Rev Code Bit 1 Revision Code Bit 1
0 1 Rev Code Bit 0 Revision Code Bit 0
Byte 12: Byte Count 12
Bit @Pup Name Description
7 1 Device_ID3 0000 = Reserved
0001 = Reserved
0010 = Reserved
0011 = Reserved
0100 = Reserved
0101 = Reserved
0110 = Reserved
0111 = Reserved
1000 = Reserved
1001 = Reserved
1010 = CK610 Yellow Cover Device, 48-pin QFN
1011 = Reserved
1100 = Reserved
1101 = Reserved
1110 = Reserved
1111 = Reserved
6 0 Device_ID2
5 1 Device_ID1
4 0 Device_ID0
7 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
SL28610
........................DOC #: SP-AP-0078 (Rev. 1.0) Page 9 of 23
Byte 14: Control Register 14
Byte 15: Control Register 15
Byte 16: Control Register 16
Byte 13: Control Register 13
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
7 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Bit @Pup Name Description
7 0 BC7 Byte count 7
6 0 BC6 Byte count 6
5 0 BC5 Byte count 5
4 1 BC4 Byte count 4
3 0 BC3 Byte count 3
2 1 BC2 Byte count 2
1 1 BC1 Byte count 1
0 0 BC0 Byte count 0
Bit @Pup Name Description
7 0 REF_Bit2 REF Slew Rate Control Bit2 & Bit0
(see Byte 3 Bit 4 for Slew Rate REF_Bit1)
61 REF_Bit0
5:0 0 RESERVED RESERVED

SL28610BLI

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Generators & Support Products Atom, Poulsbo, handheld embedded, 1.5V core, PCIe Gen.1
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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