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PSMN027-100XS,127
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
PSMN027-100XS
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights reserved.
Product data sheet
Rev
. 2
— 6 March 2012
9 of 15
NXP Semiconductors
PSMN027-100XS
N-channel 100V 26.8 m
Ω
st
andard level MOSFET
in TO220F (
SOT186A)
Fig 14.
Gate charge waveform definitions
Fig 15.
Gate-source voltage as a function of gate
charge; typical values
Fig
16.
In
put, output and rever
se transfer capaci
tances
as a function o
f drain-source v
oltage; typical
values
Fig 17.
Input and reverse transfer cap
acitances as a
function of gate-source voltage, typica
l values
003aaa508
V
GS
V
GS(th)
Q
GS1
Q
GS2
Q
GD
V
DS
Q
G(tot)
I
D
Q
GS
V
GS(pl)
003aag638
0
2
4
6
8
10
0
1
02
0
3
04
0
Q
G
(n
C)
V
GS
(V)
V
DS
= 20V
50V
80V
003aag639
10
10
2
10
3
10
4
10
-1
1
10
10
2
V
DS
(V)
C
(p
F
)
C
iss
C
rs
s
C
os
s
003aag647
0
1000
2000
3000
0369
1
2
V
GS
(V)
C
(pF)
C
iss
C
rss
PSMN027-100XS
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights reserved.
Product data sheet
Rev
. 2
— 6 March 2012
10 of 15
NXP Semiconductors
PSMN027-100XS
N-channel 100V 26.8 m
Ω
st
andard level MOSFET
in TO220F (
SOT186A)
Fig 18.
Source current as a function of sourc
e-drain voltage; typical valu
es
003aag640
0
20
40
60
80
100
0
0.3
0.6
0.9
1.2
1.5
V
SD
(V)
I
S
(A)
T
j
= 25
°
C
T
j
= 175
°
C
PSMN027-100XS
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights reserved.
Product data sheet
Rev
. 2
— 6 March 2012
1
1 of 15
NXP Semiconductors
PSMN027-100XS
N-channel 100V 26.8 m
Ω
st
andard level MOSFET
in TO220F (
SOT186A)
8.
Package outline
Fig 19.
Package outline
SOT186A (TO-220F)
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
SOT186A
3-lead TO-220F
0
5
10 mm
scale
Plastic single-ended package; isolated heatsink mounted;
1 mounting hole; 3-lead TO-220 'full pack'
SOT186A
A
A
1
Q
c
K
j
Notes
1. Terminal dimensions within this zone are uncontrolled.
2. Both recesses are
∅
2.5
×
0.8 max. depth
D
D
1
L
L
2
L
1
b
1
b
2
e
1
e
b
w
M
1
23
q
E
P
T
UNIT
D
b
1
D
1
e
q
Q
P
L
c
L
2
(1)
max.
e
1
A
5.08
3
mm
4.6
4.0
A
1
2.9
2.5
b
0.9
0.7
1.1
0.9
b
2
1.4
1.0
0.7
0.4
15.8
15.2
6.5
6.3
E
10.3
9.7
2.54
14.4
13.5
T
(2)
2.5
0.4
L
1
3.30
2.79
j
2.7
1.7
K
0.6
0.4
2.6
2.3
3.0
2.6
w
3.2
3.0
DIMENSIONS (mm are the original dimensions)
02-04-09
06-02-14
mounting
base
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
PSMN027-100XS,127
Mfr. #:
Buy PSMN027-100XS,127
Manufacturer:
Nexperia
Description:
IGBT Transistors MOSFET N-CH 100V 26.8 MOHMS STD LVL MOSFET
Lifecycle:
New from this manufacturer.
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PSMN027-100XS,127