PCF8576D All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 15 — 12 February 2015 6 of 59
NXP Semiconductors
PCF8576D
40 × 4 universal LCD driver for low multiplex rates
6.2 Pin description
[1] The substrate (rear side of the die) is connected to V
SS
and should be electrically isolated.
Table 4. Pin description
Input or input/output pins must always be at a defined level (V
SS
or V
DD
) unless otherwise specified.
Symbol Pin Description
PCF8576DT PCF8576DU
SDA 44 1, 58, 59 I
2
C-bus serial data input and output
SCL 45 2, 3 I
2
C-bus serial clock input
CLK 47 5 external clock input or output
V
DD
48 6 supply voltage
SYNC
46 4 cascade synchronization input or output; if
not used it must be left open
OSC 49 7 internal oscillator enable input
A0 to A2 50 to 52 8 to 10 subaddress inputs
SA0 53 11 I
2
C-bus address input; bit 0
V
SS
54 12
[1]
ground supply voltage
V
LCD
55 13 LCD supply voltage
BP0, BP2,
BP1, BP3
56, 1, 2, 3 14 to 17 LCD backplane outputs
S0 to S39 4 to 43 18 to 57 LCD segment outputs
n.c. - - not connected
