NCP81246
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Table 1. NCP81246 PIN DESCRIPTIONS (continued)
Pin No. DescriptionSymbol
16 SW1 Current return for high-side FET gate driver for Phase 1 of the two-phase regulator.
17 LG1/ROSC Low-side FET gate driver output for Phase 1 of the two-phase regulator.
During start-up ROSC is programmed with a pull-down resistor on this line.
18 PVCC Power supply for all three internal FET gate drivers.
19 LG2/ICCMAX_1a Low-side FET gate driver output for Phase 2 of the two-phase regulator, or output of single-phase
regulator 1b.
During start-up, regulator 1a’s ICCMAX is programmed with a pull-down on this pin.
20 SW2 Current return for high-side FET gate driver for Phase 2 of the two-phase regulator, or for
single-phase regulator 1b.
21 HG2 High-side FET gate driver output for Phase 2 of the two-phase regulator, or for single-phase
regulator 1b.
22 BST2 High-side bootstrap supply for Phase 2 of the two-phase regulator, or for single-phase regulator 1b.
23 LG3/ICCMAX_1b Low-side FET gate driver output for single-phase regulator 1a.
During start-up, regulator 1b
s ICCMAX is programmed with a pull-down on this pin.
24 SW3 Current return for high-side FET gate driver for single-phase regulator 1a.
25 HG3 High-side FET gate driver output for single-phase regulator 1a.
26 BST3 High-side bootstrap supply for single-phase regulator 1a.
27 TSENSE_1a Temperature sense input for the single-phase regulators.
28 VSP_1a Differential Output Voltage Sense Positive for single-phase regulator 1a.
29 VSN_1a Differential Output Voltage Sense Negative for single-phase regulator 1a.
30 COMP_1a Compensation for single-phase regulator 1a.
31 ILIM_1a A resistor to ground programs the current-limit for single-phase regulator 1a.
32 CSN_1a Differential current sense negative for single-phase regulator 1a.
33 CSP_1a Differential current sense positive for single-phase regulator 1a.
34 IOUT_1a A resistor to ground programs IOUT gain for single-phase regulator 1a.
35 VR_HOT# Thermal logic output for over temperature.
36 SDIO Serial VID data interface
37 ALERT# Serial VID ALERT#
38 SCLK Serial VID clock
39 DRON Bi-directional FET driver enable
40 PWM/
ADDR_VBOOT
PWM output for phase 2 of the two-phase regulator or single-phase regulator 1b.
During start-up, a resistor to ground programs Intel proprietary interface address and VBOOT
options for all three rails.
41 EN Enable. High enables all three rails.
42 VR_RDY VR_RDY indicates all three rails are ready to accept Intel proprietary interface commands.
43 IOUT_1b A resistor to ground programs IOUT gain for single-phase regulator 1b.
44 CSP_1b Differential current sense positive for single-phase regulator 1b.
45 CSN_1b Differential current sense negative for single-phase regulator 1b.
46 ILIM_1b A resistor to ground programs the current-limit for single-phase regulator 1b.
47 COMP_1b Compensation for single-phase regulator 1b.
48 VSN_1b Differential Output Voltage Sense Negative for single-phase regulator 1b.
49 VSP_1b Differential Output Voltage Sense Positive for single-phase regulator 1b.
50 PSYS/TSENSE_1b System power signal input. Resistor to ground for scaling /
Temperature sense input for the single-phase regulators.
51 VSP_2ph Differential Output Voltage Sense Positive for the two-phase regulator.
52 VSN−2ph Differential Output Voltage Sense Negative for the two-phase regulator.
