OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC2442CG#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
LTC2442
25
2442fb
For more information www.linear.com/LTC2442
Optimizing Linearity
While the integrated op-amp has rail-to-rail input range, in
order to achieve parts-per-million linearity performance,
the input range and op-amp supply voltages must be con
-
sidered. Input
levels within 1.25V of the upper op-amp rail
(V
+
) begin to degrade the performance. For example (see
Figure 15) while operating with V
+
= 5.1V and absolute
input voltages (V
IN
CM + V
IN
DIFF) up to 3.75V (V
IN
CM =
2.5V and –2.5V < V
IN
DIFF < 2.5V), the linearity is degraded
to about 17-bits. Once V
+
is increased to 5.25V or greater
the linearity improves to 19-Bits (2ppm). If the reference is
reduced to 4.096V and the input common mode is V
REF
/2
(2.048V) the linearity performance improves to better
than 1ppm with V
+
tied to V
CC
and V
–
tied to ground, see
Figure 16. Input signals near ground require about 100mV
headroom on the op-amp power supply in order to achieve
1ppm INL, see Figure 17. Optimal linearity is achieved
by driving the input differentially. As seen in Figure 18, a
single ended input (the negative input is tied to ground)
yields 18-bits (±4ppm) linearity performance. In this case
V
–
is 100mV below ground.
DIFFERENTIAL V
IN
(V)
–2.5
INL (ppm)
2
6
10
1.5
2442 F15
–2
–6
0
4
8
–4
–8
–10
–1.5–2
–0.5–1
0.5 1 2
0
2.5
V
+
= 5.1V, V
–
= 0
V
+
= 5, V
–
= 0
V
+
= 5, V
–
= –2
V
REF
= 5V
V
CC
= 5V
V
INCM
= 2.5V
V
+
> 5.25, V
–
= 0, –1, –2
DIFFERENTIAL V
IN
(V)
–2.048
INL (ppm)
0
2
2.048
2442 F16
–2
–4
–1.024
0
1.024
–1.536
–0.512
0.512
1.536
4
–1
1
–3
3
V
REF
= 4.096V
V
CC
= 5V
V
INCM
= 2.048V
V
+
= 5V, V
–
= 0V
Figure 15. INL vs Op-Amp Supply Voltage
Figure 16. Linearity vs V
IN
DIFFERENTIAL INPUT (V)
–1.25
INL (ppm)
–0.5
0
0.5
0.25
1.25
2442 F17
–1
–1.5
–2
–0.75 –0.25 0.75
1
1.5
2
V
CC
= 5V
V
REF
= 5V
V
INCM
= 0.625V
V
+
= 5V
V
–
= –100mV
SINGLE ENDED SEL
+
, SEL
–
= 0V FIXED
0
INL (ppm)
1
3
5
2
2442 F18
–1
–3
0
2
4
–2
–4
–5
0.5
1
1.5
2.5
V
CC
= 5V
V
REF
= 5V
V
IN
= V
IN
+
V
IN
–
= 0V
V
+
= 5V
V
–
= –100mV
Figure 17. Linearity Near Ground Figure 18. Single-Ended Linearity
APPLICATIONS INFORMATION
LTC2442
26
2442fb
For more information www.linear.com/LTC2442
1
5
5V
–5V
9V
4
3
2442 F19
2
6
V
OUT
V
CC
GND
C
–
LTC1983ES6-5
SHDN
C
+
C2
4.7µF
C6
4.7µF
C5
2.2µF
C3
2.2µF
C4
2.2µF
C1
4.7µF
D1
BAT54S
Input Bias Current
The 10nA typical bias current of the buffers results in less
than 1ppm (5µV) error for source resistance imbalances
of less than 500W. Matching the resistance at the inputs
cancels much of the error due to amplifier bias current.
For source resistances up to 50k, 1% resistors are ade
-
quate. Figure 20 shows proper input resistance matching
for a precision voltage divider on the CH2-3 inputs. The
resistance seen by CH2 is the parallel combination of 30k
and 10k or 7.5k. A 1%, 7.5k resistor at CH3 balances the
resistance of the divider output.
While the two input buffers will have slightly different bias
currents, the autozero process applies the bias current from
each buffer to both of the inputs for half of the conversion
time, so the offset is equal to the average of the two bias
currents multiplied by the mismatch in source resistance.
Figure 19. LTC1983 with Another Charge
Pump Stacked onto V
CC
to Give 9V
The LTC2442 breaks new ground in high impedance input
DS ADCs. The input buffer is optimized to make driving
the ADC as easy as possible, while overcoming many of
the limitations typical of integrated buffers.
Convenient +5V to –5V/+9V DC-DC
Converter
If
either of the signal inputs must include ground and
V
CC
, then the amplifier will require both a positive supply
greater than the maximum input voltage and a negative
supply. Figure 19 shows how to derive both –5V and +9V
from a single 5V supply using an LTC1983, allowing the
ADC inputs to extend as much as 300mV below ground
and above V
CC
. For inputs that include ground but do
not go within 1.5V of V
CC
, then C4, C5, C6 and D1 can
be eliminated and the amplifier positive supply can be
connected to V
CC
.
APPLICATIONS INFORMATION
LTC2442
27
2442fb
For more information www.linear.com/LTC2442
Low Power Operation
The integrated buffers have a supply current of 1mA total,
greatly reducing the total power consumption when the
ADC is operated at a low duty cycle. The typical approach
to driving a DS ADC is to use a high bandwidth amplifier
that settles very quickly in response to the sampling pro
-
cess at the ADC input. The LTC2442 approach is to use
an accurate, low bandwidth amplifier that requires a load
capacitor for compensation. This capacitor also serves as
a charge reservoir during the sampling process, so the
disturbance at the ADC input is minimal. The amplifier
only supplies the average sampling current that the ADC
draws, which is on the order of 50µA.
Scaling for Higher Input Voltages
The LTC2442 is ideally suited for applications with low-lev
-
el, differential signal with a common mode approximately
equal to mid-supply, such as strain gages and silicon
micromachined sensors. Other applications require scaling
a high voltage signal to the range of the ADC.
Figure 20 shows how to properly scale a bipolar, ground-re
-
ferred input
voltage to drive the LTC2442. First, the input
must
be level shifted so that it never exceeds the LTC2442
supply
rails. This is commonly done with an instrumenta-
tion
amplifier
or simple op-amp level shift circuit. Rather
than shift the analog input, the LTC2442 can run on ±2.5V
supplies so that ground is centered in the input range.
This is equivalent to a perfect analog level shift with no
degradation in accuracy. The digital signals are shifted
from 0V to 5V logic to ±2.5V logic by a very inexpensive
74HC4053 analog switch and the data from the LTC2442
is shifted back to 0 to 5V logic by a MMBT3904 transistor.
On both inputs, precision resistor networks scale the
input signal from ±10V to ±2.5V. CH0-1 is driven truly
differentially for maximum linearity, typically better than
3ppm, however 3 resistors and an LTC2050HV autozero
amplifier are required. The 8.88kW output resistor balances
the offset associated with the LTC2442’s bias current. The
resistance seen by CH0 is 4.44k and the offset at CH0 is
also inverted and appears at the output of the LTC2050HV.
CH2 to CH3 is driven single-ended, with CH3 tied to ground.
This degrades linearity slightly, but it is easier to implement
than a true differential drive. In this case the resistance at
CH3 should be equal to the resistance at CH2 or 7.5k. This
cir
cuit is also suitable for signals that are always positive,
with the LTC2442 operating on a single 5V supply.
APPLICATIONS INFORMATION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32

LTC2442CG#PBF

Mfr. #:
Buy LTC2442CG#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 24-Bit 2-ch. Delta-Sigma w/Int. Buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet