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LT8631IFE#PBF

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LT8631
16
8631fa
For more information www.linear.com/LT8631
so source current increases as source voltage drops. This
looks like a negative resistance load to the source and can
cause the source to current limit or latch low under low
source voltage conditions. The EN/UV threshold prevents
the regulator from operating at source voltages where the
problems might occur. This threshold can be adjusted by
setting the values R3 and R4 such that they satisfy the
following equation:
V
EN THRESHOLD
=
R3
R4
+1
•1.19V
where the LT8631 will remain off until V
IN
is above the
EN/UV threshold. Due to the comparator’s hysteresis,
switching will not stop until the input falls slightly below
the threshold voltage.
When operating in Burst Mode operation for light load
currents, the current through the EN/UV resistor network
can easily be greater than the supply current consumed
by the LT8631. Therefore, the EN/UV resistors should be
large to minimize their effect on efficiency at low loads.
INTV
CC
Regulator
An internal low dropout (LDO) regulator produces the 3V
supply from V
IN
that powers the drivers and the internal
bias circuitry. The INTV
CC
can supply enough current for
the LT8631's circuitry and must be bypassed to ground
with a minimum of 2.2µF ceramic capacitor. Good bypass
-
ing is necessary to supply the high transient currents
required by the power MOSFET gate drivers. To improve
efficiency, the internal regulator draws power from the
V
OUT
pin when the output voltage is 3.5V or higher. If the
V
OUT
pin is below 3.5V, the internal regulator will consume
current from V
IN
. Applications with high input voltage and
high switching frequency where the
internal regulator pulls
current from V
IN
will increase die temperature because of
the higher power dissipation across the regulator. Do not
connect an external load to the INTV
CC
pin.
Soft-Start and Output Voltage Tracking
The LT8631 regulates its output to the lowest voltage
present at either the TR/SS pin or an internal 0.808V
reference. A capacitor from the TR/SS pin to ground is
charged by an internal 4.5µA current source resulting in a
linear output ramp from 0V to the regulated output whose
duration is given by:
T
RAMP
=
C
TR / SS
• 0.808V
4.5µA
At power-up, a reset signal (POR) sets the soft-start latch
and discharges the TR/SS pin with to approximately 0V
to ensure proper start-up. The TR/SS pin has a maximum
current sink capability 230µA. If the TR/SS pin is used to as
a track function for an external voltage, the maximum sink
current must not be exceeded during startup. Exceeding
the maximum TR/SS sink current will inhibit operation.
When the TR/SS pin is fully discharged, the latch is reset
and the internal 4.5µA current source starts to charge the
TR/SS pin. When the TR/SS pin voltage is below ~50mV,
the V
C
pin is pulled low which disables switching.
As the TR/SS pin voltage rises above 50mV, the V
C
pin is
released and the output voltage is regulated to the TR/SS
voltage. When the TR/SS pin voltage exceeds the internal
808mV reference, the output is regulated to the reference.
The TR/SS pin voltage will continue to rise to ~3V.
The soft-start latch is set during several fault conditions:
EN/UV pin is below 1.19V, INTV
CC
has fallen too low, V
IN
is too low, or thermal shutdown. Once the latch is set,
the
TR/SS pin will discharge to ~0V and a new startup
sequence will begin.
If the load exceeds the maximum output switch current,
the output will start to drop causing the internal V
C
clamp
to be activated. As long as the V
C
node is clamped, the TR/
SS pin will be discharged. As a result, the output will be
regulated to the highest voltage that the maximum output
current can support. For example, if the output on the front
page application is loaded by 2Ω the TR/SS pin will drop
to 0.48V, regulating the output at 3V. Once the overload
condition is removed, the output will soft-start from the
temporary voltage level to the normal regulation point.
Since the TR/SS pin is pulled up to the 3V rail and has to
discharge to 0.808V before taking control of regulation,
momentary overload conditions will be tolerated without
APPLICATIONS INFORMATION
LT8631
17
8631fa
For more information www.linear.com/LT8631
a sort-start recovery. The typical time before the TR/SS
pin takes control is:
T
TR/
SS(CONTROL)
=
C
TR/SS
• 2.2V
30µA
Output Power Good
When the LT8631's output voltage is within the ±7.5%
window of the regulation point (V
FBREF
) , typically 0.74V
to 0.86V, the output voltage is considered good and
the open-drain PG pin is a high impedance node, and is
typically pulled high with an external resistor. Otherwise,
the internal pull-down device will pull the PG pin low. To
prevent glitching both the upper and lower thresholds
include 1.9% of hysteresis.
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1.19V, V
IN
undervoltage,
or thermal shutdown.
Synchronization
To select low ripple Burst Mode operation, tie the SYNC/
MODE pin below 1V (this can be ground or a logic low
output). To synchronize the LT8631 oscillator to an external
frequency connect a square wave (with a 20% to 80% duty
cycle) to the SYNC/MODE pin. The square wave amplitude
should have valleys that are below 1V and peaks above 2V.
The LT8631 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation. The LT8631
may be synchronized over a 100kHz to 1MHz range. The
RT resistor should
be chosen to set the LT8631 switching
frequency
10% below the lowest synchronization input. For
example, if the synchronization signal will be 500kHz, the RT
should be selected for 450kHz. The slope compensation is
set by the RT value, while the minimum slope compensation
required to avoid subharmonic oscillations is established
by the inductor size, input voltage, and output voltage.
Since the synchronization frequency will not change the
slopes of the inductor current waveform, if the inductor
is large enough to avoid subharmonic oscillations at the
frequency set by RT, then the slope compensation will be
sufficient for all synchronization frequencies.
For some applications it is desirable for the LT8631 to
operate in pulse-skipping mode. In pulse-skipping mode,
the full switching frequency is reached at a slightly lower
output load than in Burst Mode operation at the expense
of increased quiescent current. To enable pulse-skipping
mode, the SYNC/MODE pin is tied high either to a logic
output or to the INTV
CC
pin.
The LT8631 does not operate in forced continuous mode
regardless of SYNC/MODE signal. Connect the SYNC/MODE
pin to GND if it is not used in the application.
Shorted and Reverse Input
Protection
If
the inductor is chosen so that it won’t saturate exces-
sively, the LT8631 will tolerate a shorted output.
There
is another situation to consider in systems where
the output will be held high when the input to the LT8631
is absent. This may occur in battery charging applications
or in battery back-up systems where a battery or some
other supply is diode ORed with the LT8631's output. If
the V
IN
pin is allowed to float and the EN/UV pin is held
high (either by a logic signal or because it is tied to V
IN
),
then the LT8631's internal circuitry will pull its quiescent
current through its SW pin. This is acceptable if the system
can tolerate ~6mA in this state. If the EN pin is grounded
the SW pin current will drop to near 5µA. However, if the
V
IN
pin is grounded while the output is held high, regard-
less of EN, parasitic body diodes inside the LT8631 can
pull
current from the output through the SW pin and the
V
IN
pin. Figure 4 shows a connection of the V
IN
and EN/
UV pins that will allow the LT8631 to run only when the
input
voltage is present and that protects against a shorted
or reversed input.
APPLICATIONS INFORMATION
Figure 4. Reverse Input Voltage Protection
V
IN
V
IN
D1
LT8631
EN/UV
GND
8631 F04
C1
LT8631
18
8631fa
For more information www.linear.com/LT8631
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 5 shows the
recommended component placement with trace, ground
plane, and via locations. Note that large, switched cur
-
rents flow
in the LT8631's V
IN
pin and the input capacitor
(C1). The loop formed by the input capacitor should be as
small as possible by placing the capacitor adjacent to the
V
IN
pin and ground plane. When using a physically large
input capacitor the resulting loop may become too large in
which case using a small case/value capacitor placed close
to the V
IN
pin and ground plane plus a larger capacitor
further away is preferred. These components, along with
the inductor and output capacitor, should be placed on
the same side of the circuit board, and their connections
should be made on that layer. Place a local, unbroken
ground plane under the application circuit on the layer
closest to the surface layer. The SW and BST nodes should
be as small as possible. Finally, keep the FB and RT nodes
small so that the ground traces will shield them from the
SW and BST nodes. The exposed pad on
the bottom of
the package must be soldered to ground so that the pad
is connected to ground electrically and also acts as a heat
sink thermally. To keep thermal resistance low, extend the
ground plane as much as possible, and add thermal vias
under and near the LT8631 to additional ground planes
within the circuit board and on the bottom side.
High Temperature Considerations
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT8631. The exposed pad on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to large copper layers below with thermal vias;
these layers will spread heat dissipated by the LT8631.
APPLICATIONS INFORMATION
V
OUT
8631 F05
OUTLINE OF LOCAL
GROUND PLANE
FB
IND
INTV
CC
11
12
13
14
15
16
18
BST
SW
C1
C2
C3
C4
C5 C6
R5
R1
R2
L1
20
V
IN
TR/SS
RT
PG
EN/UV
SYNC
1
3
5
6
7
8
9
10
VIAS TO GROUND PLANE
Figure 5. Recommended PCB Layout for the LT8631
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LT8631IFE#PBF

Mfr. #:
Buy LT8631IFE#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 100V, 1A Synchronous Micropower Step-Down Regulator
Lifecycle:
New from this manufacturer.
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