Products and specifications discussed herein are subject to change by Micron without notice.
1GB (x72, ECC, SR) 240-Pin DDR2 VLP RDIMM
Features
PDF: 09005aef82255aba/Source: 09005aef82255a83 Micron Technology, Inc., reserves the right to change products or specifications without notice.
HVF18C64_128_256x72G.fm - Rev. B 5/06 EN
1 ©2003 Micron Technology, Inc. All rights reserved.
DDR2 VLP Registered DIMM (RDIMM)
MT18HVF12872(P) – 1GB
For the latest data sheet and for component data sheets, refer to Micron's Web site: www.micron.com/products/ddr2
Features
• Supports 95°C with double refresh
• Fits with the ATCA form factor
• 240-pin, registered dual in-line memory module
• Fast data transfer rates: PC2-3200, PC2-4200, or PC2-5300
• Supports ECC error detection and correction
•V
DD = VDDQ = +1.8V
•V
DDSPD = +1.7V to +3.6V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4-bit prefetch architecture
• DLL to align DQ and DQS transitions with CK
• Single rank
• Multiple internal device banks for concurrent
operation
• Programmable CAS# latency (CL)
• Posted CAS# additive latency (AL)
• WRITE latency = READ latency - 1
t
CK
• Programmable burst lengths: 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)
• Serial presence-detect (SPD) with EEPROM
• Gold edge contacts
Figure 1: 240-Pin VLP DIMM (MO-237)
Functionally equivelent to R/C “U” and “V”
Notes: 1. CL = CAS (READ) latency; registered mode
will add one clock cycle to CL.
2. Contact Micron for product availability.
Options Marking
•Parity P
•Package
240-pin DIMM (lead-free) Y
• Frequency/CAS latency
1
3.0ns @ CL = 5 (DDR2-667)
2
-667
3.75ns @ CL = 4 (DDR2-533) -53E
5.0ns @ CL = 3 (DDR2-400) -40E
•PCB height
17.9mm (1.18in)
Height: 17.9mm (0.705in)
Table 1: Addressing
1GB
Refresh count
8K
Row address
16K (A0–A13)
Device bank address
4 (BA0, BA1)
Device page size per bank
1KB
Device configuration
512Mb (128 Meg x 4)
Column address
2K (A0–A9, A11)
Module rank address
1 (S0#)
Table 2: Key Timing Parameters
Speed Grade Industry Nomenclature
Data Rate (MT/s)
t
RCD
(ns)
t
RP
(ns)
t
RC
(ns)
CL = 5 CL = 4 CL = 3
-667 PC2-5300 667 533 – 15 15 55
-53E PC2-4200 – 533 400 15 15 55
-40E PC2-3200 – 400 400 15 15 55