ADT7466ZEVB Datasheet ADT7466ARQZ-RL7, ADT7466ARQZ, ADT7466ARQZ-REEL | P46-P48

ADT7466

Rev. 2 | Page 46 of 48 | www.onsemi.com

Fan Pulses Per Revolution

Table 64. Register 0x39—Fan Pulses Per Revolution Register (Power-On Default = 0x05)

Bit No. Name Read/Write Description

1:0 FAN1 Read/Write Sets number of pulses to be counted when measuring FAN1 speed. Can be

used to determine fan’s pulses per revolution number for unknown fan type.

Pulses Counted

00 = 1

01 = 2 (default)

10 = 3

11 = 4

3:2 FAN2 Read/Write Sets number of pulses to be counted when measuring FAN2 speed. Can be

used to determine fan’s pulses per revolution number for unknown fan type.

Pulses Counted

00 = 1

01 = 2 (default)

10 = 3

11 = 4

7:4 Unused – Unused. Write ignored. Reads back 0.

Information Registers

Table 65. Register 0x3D—Device ID Register (Power-On Default = 0x66)

Bit No. Name Read/Write Description

7:0 Reserved Read only Contains device ID number.

Table 66. Register 0x3E—Company Id Register (Power-On Default = 0x41)

Bit No. Name Read/Write Description

7:0 Reserved Read only Contains company ID number.

Table 67. Register 0x3F—Revision Number Register (Power-On Default = 0x02)

Bit No. Name Read/Write Description

7:0 Reserved Read only Contains device revision level.

Fan Drive (DAC)

These registers reflect the drive value of each fan at any given time. When in automatic fan speed control mode, the ADT7466 reports the

drive values back through these registers. The fan drive values vary according to temperature in automatic fan speed control mode.

During fan startup, these registers report 0x00. In software mode, the fan drive outputs can be set to any value by writing to these

registers.

Table 68. Fan Drive (DAC) Registers (Power-On Default = 0x00)

0x40 Read/Write DRIVE1, Current Fan 1 drive value.

0x41 Read/Write DRIVE2, Current Fan 2 drive value.

XOR Tree Test Enable

This register becomes read only when the Configuration Register 1 lock bit is set to 1. Additional attempts to write to this register have no

effect.

Table 69. Register 0x42—XOR Tree Test Enable (Power-On Default = 0x00)

Bit No. Name Read/Write Description

7:1 Reserved – Unused. Do not write to these bits.

0 XEN Read/Write If the XEN bit is set to 1, the device enters the XOR tree test mode. Clearing the bit

removes the device from the XOR test mode.

ADT7466

Rev. 2 | Page 47 of 48 | www.onsemi.com

Fan Tachometer Reading

These registers count the number of 12.43 μs periods (based on a local 82 kHz clock) that occur between a number of consecutive fan

tach pulses (default = 2). The number of tach pulses used to count can be changed by using the fan pulses per revolution register (0x39).

This allows the fan speed to be accurately measured. Since a valid fan tachometer reading requires two bytes to be read, the low byte must

be read first. Both the low and high bytes are then frozen until read. At power-on, these registers contain 0x0000 until such time as the

first valid fan tach measurement is read into these registers. This prevents false interrupts from occurring while the fans are spinning up.

A count of 0xFFFF indicates that a fan is

• Stalled or blocked (object jamming the fan).

• Failed (internal circuitry destroyed).

• Not populated (the ADT7466 expects to see a fan connected to each tach. If a fan is not connected to that tach, its tach minimum

high and low byte should be set to 0xFFFF).

• 2-wire instead of 3-wire.

Table 70. Fan Tachometer Reading Registers (Power-On Default = 0xFF)

0x48 Read only TACH1 low byte

0x49 Read only TACH1 high byte

0x4A Read only TACH2 low byte

0x4B Read only TACH2 high byte

Fan Tachometer Limit

Exceeding any of the tach limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit is set in

Interrupt Status Register 1 to indicate the fan failure. Setting the Configuration Register 1 lock bit has no effect on these registers.

Table 71. Fan Tachometer Limit Registers (Power-On Default = 0xFF)

0x4C Read/Write TACH 1 minimum low byte

0x4D Read/Write TACH 1 minimum high byte

0x4E Read/Write TACH 2 minimum low byte

0x4F Read/Write TACH 2 minimum high byte

Manufacturer’s Test

These registers are for manufacturer’s use only and should not be read or written to in normal use.

These registers become read only when the Configuration Register 1 lock bit is set to 1. Additional attempts to write to these register have

no effect.

Table 72. Register 0x3F—Manufacturers Test Registers (Power-On Default = 0x00)

0x50 Read/Write Manufacturer’s Test Register 1

0x51 Read/Write Manufacturer’s Test Register 2

0x52 Read/Write Manufacturer’s Test Register 3

0x53 Read/Write Manufacturer’s Test Register 4

ADT7466

Rev. 2 | Page 48 of 48 | www.onsemi.com

OUTLINE DIMENSIONS

PIN 1

SEATING

PLANE

0.010

0.004

0.012

0.008

0.025

BSC

0.010

0.006

0.050

0.016

8°

0°

COPLANARITY

0.004

0.065

0.049

0.069

0.053

0.154

BSC

0.236

BSC

COMPLIANT TO JEDEC STANDARDS MO-137AB

0.193

BSC

Figure 46. 16-Lead Shrink Small Outline Package [QSOP]

(RQ-16)

Dimensions shown in inches

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADT7466ARQ Z

−40°C to +125°C 16-Lead QSOP RQ-16

ADT7466ARQ Z-REEL

−40°C to +125°C 16-Lead QSOP RQ-16

ADT7466ARQ Z-RL7

−40°C to +125°C 16-Lead QSOP RQ-16

EVAL-ADT7466EB Evaluation Board

Z = Pb-free part.

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