8
LTC3445
3445fa
UU
U
PI FU CTIO S
V
TRACK
(Pin 1): Supply Sense that V
CC
BATT Tracks when
above 3V. Must be ≤ V
CC1
.
V
BACKUP
(Pin 2): Back-Up Battery Input.
V
CC1
(Pins 3, 10): Power Supply (2.5V to 5.5V).
Both V
CC1
pins must be connected externally to the 2.5V to 5.5V
supply.
PGOOD (Pin 4): Fault Report (Undervoltage). Open-drain
driver sinks current whenever LDO1, LDO2 or buck out-
puts are low.
ADD7 (Pin 5): I
2
C Strappable Address (Bit 7)—V
CC1
or
ground.
SDA (Pin 6): I
2
C Data Input.
NC (Pin 7): Not Connected.
SCL (Pin 8): I
2
C Clock Input.
ADD6 (Pin 9): I
2
C Strappable Address (Bit 6)—V
CC1
or
ground.
GND (Pin 11): Buck NFET Ground.
NC (Pin 12): Not Connected.
NC (Pin 13): Not Connected.
SW (Pin 14): Buck Regulator Switch.
RUN (Pin 15): Chip Enable. 1.5V enables the part. Forcing
this pin below 0.3V shuts down the device. In shutdown,
all functions are disabled, drawing <35µA supply current.
Do not leave RUN floating. Must be ≤ V
CC1
.
NC (Pin 16): Not Connected.
FB (Pin 17): Buck Regulator Feedback.
V
CC
BATT (Pin 18): V
CC
BATT PowerPath Output.
BATTFAULT (Pin 19): Open-Drain Output. It is low when
V
CC1
is low.
LDO1FB (Pin 20): LDO1 Regulator Sense.
LDO1 (Pin 21): LDO1 Regulator Output.
V
CC2
(Pin 22): LDO Regulator Supply Voltage.
LDO2 (Pin 23): LDO2 Regulator Output.
LDO2FB (Pin 24): LDO2 Regulator Sense.
Exposed Pad (Pin 25): Ground. Must be soldered to PCB
ground for electrical contact and optimum thermal
performance.
