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(5) FC0 to FC3 Common/segment output waveform frame frequency control data
These control data bits set the frame frequency of the common and segment output waveforms.
Control data Frame frequency fo[Hz]
FC0 FC1 FC2 FC3
Internal oscillator
operating mode
(The control data OC is 0,
fosc=300[kHz]typ)
External clock
operating mode
(The control data OC is 1,
and EXF is 0,
f
CK
1=300[kHz]typ)
External clock
operating mode
(The control data OC is 1,
and EXF is 1,
f
CK
2=38[kHz]typ)
0 0 0 0 fosc/6144 f
CK
1/6144 f
CK
2/768
0 0 0 1 fosc/5376 f
CK
1/5376 f
CK
2/672
0 0 1 0 fosc/4608 f
CK
1/4608 f
CK
2/576
0 0 1 1 fosc/3840 f
CK
1/3840 f
CK
2/480
0 1 0 0 fosc/3456 f
CK
1/3456 f
CK
2/432
0 1 0 1 fosc/3072 f
CK
1/3072 f
CK
2/384
0 1 1 0 fosc/2688 f
CK
1/2688 f
CK
2/336
0 1 1 1 fosc/2304 f
CK
1/2304 f
CK
2/288
1 0 0 0 fosc/2112 f
CK
1/2112 f
CK
2/264
1 0 0 1 fosc/1920 f
CK
1/1920 f
CK
2/240
1 0 1 0 fosc/1728 f
CK
1/1728 f
CK
2/216
1 0 1 1 fosc/1536 f
CK
1/1536 f
CK
2/192
1 1 0 0 fosc/1344 f
CK
1/1344 f
CK
2/168
1 1 0 1 fosc/1152 f
CK
1/1152 f
CK
2/144
1 1 1 0 fosc/960 f
CK
1/960 f
CK
2/120
1 1 1 1 fosc/768 f
CK
1/768 f
CK
2/96
(6) DN S28 pin state setting control data
This control data bit sets state of the S28 pin.
DN
Number of display segments Pin state
1/4 duty 1/3 duty 1/2 duty 1/1 duty S28
0 Up to 96 segments Up to 75 segments Up to 52 segments Up to 27 segments L (V
SS
)
1 Up to100 segments Up to 78 segments Up to 54 segments Up to 28 segments S28
(7) EXF External clock operating frequency setting control data
This control data sets the operating frequency of the external clock which input into the OSCI pin, when the external
clock operating mode (OC = “1”) is set. However, this control data is effective only when external clock operating
mode (OC = “1”) is set.
EXF External clock operating frequency f
CK
[KHz]
0 f
CK
1=300[kHz]typ
1 f
CK
2=38[kHz]typ
(8) OC Internal oscillator operating mode/external clock operating mode switching control data.
This control data bit selects either the internal oscillator operating mode or external clock operating mode.
OC Fundamental clock operating mode
Input pin (OSCI) state
0 Internal oscillator operating mode
Connect to GND
1 External clock operating mode
Input the clock from the outside
(9) SC Segment on/off control data
This control data bit controls the on/off state of the segments.
SC Display state
0 on
1 off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
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(10) BU Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU Mode
0 Normal mode
1
Power saving mode
In this mode, the internal oscillator circuit stops oscillation if the IC is in the internal oscillator operating mode(OC=0) and
the IC stops receiving external clock signals if the IC is in the external clock operating mode(OC=1). The common and
segment output pins go to the V
SS
level.
However, the S1/P1 to S4/P4 output pins can be used as general-purpose output ports under the control of the data bits
P0 to P2. (The general-purpose output port P1 to P4 can not be used as clock output or PWM output).
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(11) W10 to W15, W20 to W25, W30 to W35 PWM data of the PWM output
These control data bits set the pulse width of the PWM output P1 to P4. However, when the PWM output function
isn’t used, these control data bits become invalid. In addition, when the external clock operating frequency is set the
f
CK
2 = 38[kHz] typ (EXF = “1”) in external clock operating mode (OC = “1”), these control data bits become
invalid.
Wn0 Wn1 Wn2 Wn3 Wn4 Wn5
Pulse width of
PWM output
Wn0 Wn1 Wn2 Wn3 Wn4 Wn5
Pulse width of
PWM output
0 0 0 0 0 0 (1/64)Tp 0 0 0 0 0 1 (33/64)Tp
1 0 0 0 0 0 (2/64)Tp 1 0 0 0 0 1 (34/64)Tp
0 1 0 0 0 0 (3/64)Tp 0 1 0 0 0 1 (35/64)Tp
1 1 0 0 0 0 (4/64)Tp 1 1 0 0 0 1 (36/64)Tp
0 0 1 0 0 0 (5/64)Tp 0 0 1 0 0 1 (37/64)Tp
1 0 1 0 0 0 (6/64)Tp 1 0 1 0 0 1 (38/64)Tp
0 1 1 0 0 0 (7/64)Tp 0 1 1 0 0 1 (39/64)Tp
1 1 1 0 0 0 (8/64)Tp 1 1 1 0 0 1 (40/64)Tp
0 0 0 1 0 0 (9/64)Tp 0 0 0 1 0 1 (41/64)Tp
1 0 0 1 0 0 (10/64)Tp 1 0 0 1 0 1 (42/64)Tp
0 1 0 1 0 0 (11/64)Tp 0 1 0 1 0 1 (43/64)Tp
1 1 0 1 0 0 (12/64)Tp 1 1 0 1 0 1 (44/64)Tp
0 0 1 1 0 0 (13/64)Tp 0 0 1 1 0 1 (45/64)Tp
1 0 1 1 0 0 (14/64)Tp 1 0 1 1 0 1 (46/64)Tp
0 1 1 1 0 0 (15/64)Tp 0 1 1 1 0 1 (47/64)Tp
1 1 1 1 0 0 (16/64)Tp 1 1 1 1 0 1 (48/64)Tp
0 0 0 0 1 0 (17/64)Tp 0 0 0 0 1 1 (49/64)Tp
1 0 0 0 1 0 (18/64)Tp 1 0 0 0 1 1 (50/64)Tp
0 1 0 0 1 0 (19/64)Tp 0 1 0 0 1 1 (51/64)Tp
1 1 0 0 1 0 (20/64)Tp 1 1 0 0 1 1 (52/64)Tp
0 0 1 0 1 0 (21/64)Tp 0 0 1 0 1 1 (53/64)Tp
1 0 1 0 1 0 (22/64)Tp 1 0 1 0 1 1 (54/64)Tp
0 1 1 0 1 0 (23/64)Tp 0 1 1 0 1 1 (55/64)Tp
1 1 1 0 1 0 (24/64)Tp 1 1 1 0 1 1 (56/64)Tp
0 0 0 1 1 0 (25/64)Tp 0 0 0 1 1 1 (57/64)Tp
1 0 0 1 1 0 (26/64)Tp 1 0 0 1 1 1 (58/64)Tp
0 1 0 1 1 0 (27/64)Tp 0 1 0 1 1 1 (59/64)Tp
1 1 0 1 1 0 (28/64)Tp 1 1 0 1 1 1 (60/64)Tp
0 0 1 1 1 0 (29/64)Tp 0 0 1 1 1 1 (61/64)Tp
1 0 1 1 1 0 (30/64)Tp 1 0 1 1 1 1 (62/64)Tp
0 1 1 1 1 0 (31/64)Tp 0 1 1 1 1 1 (63/64)Tp
1 1 1 1 1 0 (32/64)Tp 1 1 1 1 1 1 (64/64)Tp
Note : W10 to W15 PWM data of the PWM output (Ch1)
W20 to W25 PWM data of the PWM output (Ch2)
W30 to W35 PWM data of the PWM output (Ch3)
1
fp
Tp=
n=1 to 3

LC75843UGA-AH

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
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