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ADL5534ACPZ-R7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
ADL5534 Data Sheet
Rev. B | Page 12 of 16
06836-018
470nH
470nH
10nF
1nF
1µF
VPOS
GND
10nF 1µF
1nF
VPOS1
GND1
NC
CLIN1
NC
NC
NC
NC
NC
Z1
ADL5534
NC
13
RFOUT1
16
RFIN1
RFOUT2
14
NC
NC
15
NC
CLIN2
RFIN2
9
12
4
10
2
11
3
1
8
6
7
5
RFIN
10nF
AD9640
49.9Ω
49.9Ω
120nH
33Ω
120nH
100pF
120nH
33Ω
120nH
100pF
16pF
4.7pF
CML
Figure 19. Narrow-Band IF Sampling Solution for Unbuffered ADC
ADC DRIVING APPLICATION
The ADL5534 is a high linearity, fixed gain IF amplifier suitable
for use as an ADC driver. The ADL5534 has a differential input
and output impedance of 100 Ω. A flux-coupled RF transformer
with a 2:1 impedance ratio was used to perform the single-ended-
to-differential conversion at the input of the ADL5534. The
interface between the ADL5534 and the AD9640 is a third-
order low pass filter presenting a 100 Ω differential impedance
to the source and load. The ADL5534 must be ac-coupled to
prevent dc bias from entering the inputs of the ADC. Capacitors
of 100 pF were chosen to reduce any low frequency noise coming
from the ADL5534 and provide dc blocking. The measured
results for this interface shows 0.5 dB insertion loss for a 20 MHz
bandwidth centered around 92 MHz. The wideband response for
the interface is shown in Figure 20. The single-tone results in
Figure 21 show an SNR of 69.3 dB and an SFDR of 82 dBc. The
two-tone results in Figure 22 show an IMD3 of −80.5 dBc and
an SFDR of 78 dBc.
06836-019
FREQUENCY (MHz)
NORMALIZED LOSS (dB)
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
50 100 150 200 250 300 350
400
Figure 20. Measured Frequency Response of ADC interface
in Figure 19
(dBFS)
FREQUENCY (MHz)
06836-020
SNR = 69.334dBc
SFDR = 82.267dBc
NOISE FLOOR = –109.519dB
FUND = –1.05dBFs
SECOND = –82.262dBc
THIRD = –88.688dBc
60 12
18 24 30
36 42 48 54 60
0
–15
–30
–45
–60
–75
–90
–105
–120
–135
Figure 21. Measured Single-Tone Performance of the Circuit in Figure 19
(dBFS)
FREQUENCY (MHz)
06836-021
SFD
R = 78.267dBc
NOISE FLOOR = –110.131dB
FUND 1 = –7.181dBF
s
FUND 2 = –7.191dBF
s
IMD
(2F1 – F2)
= –80.5
38dBc
IMD (2F2 – F1)
= –82.086dB
c
60 12 18
24 30 36 42 48 54 60
0
–15
–30
–45
–60
–75
–90
–105
–120
–135
Figure 22. Measured Two-Tone Performance of the Circuit in Figure 19
Data Sheet ADL5534
Rev. B | Page 13 of 16
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 23 shows the recommended land pattern for ADL5534.
To minimize thermal impedance, the exposed paddle on the
package underside should be soldered down to a ground plane.
If multiple ground layers exist, they should be stitched together
using vias. Pin 1 to Pin 4, Pin 6, Pin 9 to Pin 11, and Pin 14 to
Pin 15 can be left unconnected, or can be connected to ground.
Connecting these pins to ground improves device-to-device
isolation and slightly enhances thermal impedance. For more
information on land pattern design and layout, refer to the
AN-772 Application Note, A Design and Manufacturing Guide for
the Lead Frame Chip Scale Package (LFCSP).
06836-022
4.8mm
2.4mm
3.1mm
0.8mm
0.2mm
Figure 23. Recommended Land Pattern
ADL5534 Data Sheet
Rev. B | Page 14 of 16
EVALUATION BOARD
Figure 24 shows the schematic for the ADL5534 evaluation
board. The board is powered by a single 5 V supply. The
components used on the board are listed in Table 6.
Transformers (T1 and T2) are provided so the ADL5534
can be configured as a balanced amplifier. Applying 5 V to
VPOS biases the amplifier corresponding to RFIN1 and
RFOUT1. Applying 5 V to VPOS1 biases the amplifier
corresponding to RFIN2 and RFOUT2. To bias both amplifiers
from a single supply, connect 5 V to VPOS or VPOS1 and
attach a jumper across W3.
RFOUT1
T2
ADT2-1T-1P+
L1
470nH
L2
470nH
RFOUT2
C7
10nF
C5
1nF
C9
1µF
C16
OPEN
VPOS
GND
C8
10nF
C10
1µF
VPOS1
GND1
W1
W2
NC
CLIN1
NC
NC
NC
NC
NC
Z1
ADL5534
NC
13
RFOUT1
16
RFIN1
RFOUT2
14
NC
NC
15
NC
CLIN2
RFIN2
9
12
4
10
2
11
3
1
8
6
7
5
06836-023
T1
ADT2-1T-1P+
1
1
C15
OPEN
R6
OPEN
R8
OPEN
R4
OPEN
C14
OPEN
C13
OPEN
C4
10nF
C2
10nF
R2
OPEN
RFIN1
RFIN2
C12
OPEN
C11
OPEN
C3
10nF
W3
V
POS
V
POS1
C1
10nF
R3
OPEN
R1
OPEN
R5
OPEN
R7
OPEN
C6
1nF
Figure 24. Evaluation Board Schematic
Table 6. Evaluation Board Configuration Options
Component Description Default Condition
C1, C2, C3, C4 AC coupling capacitors 10 nF, Size 0402
C5, C6 Provides decoupling for the on-board linearizer 1 nF, Size 0603
C11, C12, C13, C14,
C15, C16
Optional components used for configuring ADL5534 as a balanced amplifier
Open, Size 0402
C9, C10 Power-supply decoupling capacitors 1 µF, Size 0603
C7, C8 Power-supply decoupling capacitors 10 nF, Size 0603
R1, R2, R3, R4, R5,
R6, R7, R8
Optional components used for configuring ADL5534 as a balanced amplifier Open, Size 0603
T1, T2
T1 and T2 are 50 Ω to100 Ω impedance transformers used to configure the ADL5534
as a balanced amplifier; T1 and T2 are used to present a 100 Ω differential impedance
to the
ADL5534
Installed (Mini-Circuits®
ADT2-1T-1P+)
L1, L2 DC bias inductor 470 nH, Size 1008
VPOS, GND,
VPOS1, GND1
Clip-on terminals for power supply
VPOS, VPOS1; red
GND, GND1; black
W1, W2
2-pin jumper for connection of ground and supply via cable
W1, W2
W3 2-pin jumper used to connect VPOS to VPOS1 W3
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

ADL5534ACPZ-R7

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Manufacturer:
Analog Devices Inc.
Description:
RF Amplifier Dual 5531
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