GTL2008_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 19 February 2010 5 of 22
NXP Semiconductors
GTL2008
GTL translator with power good control and high-impedance outputs
7. Functional description
Refer to Figure 1 “Logic diagram of GTL2008”.
7.1 Function tables
[1] 1AO, 2AO, 3AO, 4AO and 5A/6A condition changed by ENn power good signal as described in Table 5 and
Table 6
.
6BI 20 data input (GTL)
5BI 21 data input (GTL)
11BO 22 data output (GTL)
EN2 23 enable input (LVTTL)
7BO2 24 data output (GTL)
7BO1 25 data output (GTL)
2BI 26 data input (GTL)
1BI 27 data input (GTL)
V
CC
28 positive supply voltage
Table 3. Pin description
…continued
Symbol Pin Description
Table 4. GTL input signals
H = HIGH voltage level; L = LOW voltage level.
Input Output
[1]
1BI/2BI/3BI/4BI/9BI 1AO/2AO/3AO/4AO/9AO
LL
HH
Table 5. EN1 power good signal
H = HIGH voltage level; L = LOW voltage level.
EN1 1AO and 2AO 5A
L 1BI and 2BI disconnected (high-Z) 5BI disconnected
H follows BI 5BI connected
Table 6. EN2 power good signal
H = HIGH voltage level; L = LOW voltage level.
EN2 3AO and 4AO 6A
L 3BI and 4BI disconnected (high-Z) 6BI disconnected
H follows BI 6BI connected
