DUAL LVCMOS / LVTTL-TODIFFERENTIAL
HSTL TRANSLATOR
85222-01 DATA SHEET
4 REVISION A 5/7/15
TABLE 4A. AC CHARACTERISTICS, V
DD
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 350 MHz
t
PD
Propagation Delay; NOTE 1 700 1075 ps
tsk(pp) Part-to-Part Skew; NOTE 2, 3 375 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 150 800 ps
odc Output Duty Cycle
ƒ ≤ 150MHz 48 52 %
150 < ƒ ≤ 250MHz
46 54 %
250 < ƒ ≤ 350MHz
45 55 %
NOTE 1: Measured from V
DD
/2 of the input to the differential output crossing point.
NOTE 2: Defi ned as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defi ned in accordance with JEDEC Standard 65.
TABLE 4B. AC CHARACTERISTICS, V
DD
= 2.5V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 350 MHz
t
PD
Propagation Delay; NOTE 1 700 1200 ps
tsk(pp) Part-to-Part Skew; NOTE 2, 3 475 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 150 800 ps
odc Output Duty Cycle
ƒ ≤ 150MHz
48 52 %
150 < ƒ ≤ 350MHz
46 54 %
NOTE 1: Measured from V
DD
/2 of the input to the differential output crossing point.
NOTE 2: Defi ned as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defi ned in accordance with JEDEC Standard 65.
