OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

74ABT544D,623

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
74ABT544 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 3 November 2011 3 of 16
NXP Semiconductors
74ABT544
Octal latched transceiver with dual enable; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration
LEBA
OEAB
74ABT544
V
CC
OEBA EBA
A0 B0
A1 B1
A2 B2
A3 B3
A4 B4
A5 B5
A6 B6
A7 B7
EAB LEAB
GND
001aac755
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
Table 2. Pin description
Symbol Pin Description
LEBA
1 B-to-A latch enable input (active LOW)
OEBA
2 B-to-A output enable input (active LOW)
A0 to A7 3, 4, 5, 6, 7, 8, 9, 10 data input or output
EAB
11 A-to-B enable input (active LOW)
GND 12 ground (0 V)
OEAB
13 A-to-B output enable input (active LOW)
LEAB
14 A-to-B latch enable input (active LOW)
B0 to B7 22, 21, 20, 19, 18, 17, 16, 15 data input or output
EBA
23 B-to-A enable input (active LOW)
V
CC
24 positive supply voltage
74ABT544 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 3 November 2011 4 of 16
NXP Semiconductors
74ABT544
Octal latched transceiver with dual enable; 3-state
6. Functional description
6.1 Function table
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX
or EXX (XX = AB or BA);
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX
or EXX (XX = AB or BA);
= LOW-to-HIGH clock transition of LEXX
or EXX (XX = AB or BA);
NC = no change;
X = don’t care;
Z = high-impedance OFF-state.
6.2 Description
The 74ABT544 contains two sets of eight D-type latches, with separate control pins for
each set.
Using data flow from A-to-B as an example, when the A-to-B enable (EAB
) input, the
A-to-B latch enable (LEAB
) input and the A-to-B output enable (OEAB) input are all LOW,
the A-to-B path is transparent.
A subsequent LOW-to-HIGH transition of the LEAB
signal puts the A data into the latches
where it is stored and the B outputs no longer change with the A inputs. With EAB
and
OEAB
both LOW, the 3-state B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B-to-A is similar, but using the EBA
, LEBA, and OEBA inputs.
Table 3. Function selection
[1]
Input Output Status
OEXX EXX LEXX An or Bn Bn or An
H X X X Z disabled
XHXXZ
L L h Z disabled + latch
lZ
LL h L latch + display
lH
L L L H L transparent
LH
L L H X NC hold
74ABT544 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 3 November 2011 5 of 16
NXP Semiconductors
74ABT544
Octal latched transceiver with dual enable; 3-state
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C.
8. Recommended operating conditions
9. Static characteristics
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage
[1]
1.2 +7.0 V
V
O
output voltage output in OFF-state or HIGH-state
[1]
0.5 +5.5 V
I
IK
input clamping current V
I
< 0 V 18 - mA
I
OK
output clamping current V
O
< 0 V 50 - mA
I
O
output current output in LOW-state - 128 mA
T
j
junction temperature
[2]
-150C
T
stg
storage temperature 65 +150 C
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.5 - 5.5 V
V
I
input voltage 0 - V
CC
V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
I
OH
HIGH-level output current 32--mA
I
OL
LOW-level output current - - 64 mA
t/V input transition rise and fall rate 0 - 10 ns/V
T
amb
ambient temperature in free air 40 - +85 C
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C Unit
Min Typ Max Min Max
V
IK
input clamping voltage V
CC
= 4.5 V; I
IK
= 18 mA 1.2 0.9 - 1.2 - V
V
OH
HIGH-level output
voltage
V
I
= V
IL
or V
IH
V
CC
= 4.5 V; I
OH
= 3 mA 2.5 3.2 - 2.5 - V
V
CC
= 5.0 V; I
OH
= 3 mA 3.0 3.7 - 3.0 - V
V
CC
= 4.5 V; I
OH
= 32 mA 2.0 2.3 - 2.0 - V
V
OL
LOW-level output
voltage
V
CC
= 4.5 V; I
OL
=64mA;
V
I
=V
IL
or V
IH
- 0.42 0.55 - 0.55 V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

74ABT544D,623

Mfr. #:
Buy 74ABT544D,623
Manufacturer:
NXP Semiconductors
Description:
IC TRANSCVR INVERT 5.5V 24SO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet