REV. A
ADSP-2189M
16
FREQUENCY DEPENDENCY FOR TIMING
SPECIFICATIONS
t
CK
is
defined as 0.5t
CKI
. The ADSP-2189M uses an input clock
with a frequency equal to half the instruction rate: a 37.50 MHz
input clock (which is equivalent to 28 ns) yields a 13 ns proces-
sor cycle (equivalent to 75 MHz). t
CK
values within the range of
0.5t
CKI
period should be substituted for all relevant timing pa-
rameters to obtain the specification value.
Example: t
CKH
= 0.5t
CK
– 7 ns = 0.5 (15 ns) – 7 ns = 0.5 ns
ENVIRONMENTAL CONDITIONS
1
Rating Description Symbol Value
Thermal Resistance
(Case-to-Ambient) θ
CA
48°C/W
(Junction-to-Ambient) θ
JA
50°C/W
(Junction-to-Case) θ
JC
2°C/W
NOTE
1
Where the ambient temperature rating (T
AMB
) is:
T
AMB
= T
CASE
– (PD × θ
CA
)
T
CASE
= Case temperature in °C
PD = Power dissipation in W.
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C × V
DD
2
× f
C = load capacitance, f = output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as follows:
Assumptions:
External data memory is accessed every cycle with 50% of
the address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DDEXT
= 3.3 V and t
CK
= 15 ns.
Total Power Dissipation = P
INT
+ (C × V
DDEXT
2
× f)
P
INT
= internal power dissipation from Power vs. Frequency
graph (Figure 15).
(C × V
DDEXT
2
× f) is calculated for each output:
# of ⴛⴛ
Parameters Pins C V
DDEXT
2
fPD
Address, DMS 8 10 pF 3.3
2
V 33.3 MHz 29.0 mW
Data Output, WR 9 10 pF 3.3
2
V 16.67 MHz 16.3 mW
RD 1 10 pF 3.3
2
V 16.67 MHz 1.8 mW
CLKOUT 1 10 pF 3.3
2
V 33.3 MHz 3.6 mW
50.7 mW
Total power dissipation for this example is P
INT
+ 50.7 mW.
Output Drive Currents
Figure 14 shows typical I-V characteristics for the output drivers
on the ADSP-2189M. The curves represent the current drive
capability of the output drivers as a function of output voltage.
V
OH
V
OL
SOURCE VOLTAGE V
0
0.5 1.0
SOURCE CURRENT mA
60
0
20
40
60
40
20
V
DDEXT
= 3.6V @ 40C
V
DDEXT
= 3.3V @ +25C
V
DDEXT
= 2.5V @ +85C
V
DDEXT
= 2.5V @ +85C
V
DDEXT
= 3.3V @ +25C
V
DDEXT
= 3.6V @ 40C
80
80
1.5 2.0 2.5 3.0 3.5 4.0
Figure 14. Typical Output Driver Characteristics
REV. A
ADSP-2189M
17
VALID FOR ALL TEMPERATURE GRADES.
1
POWER REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
2
TYPICAL POWER DISSIPATION AT 2.5V V
DDINT
AND +25C EXCEPT
WHERE SPECIFIED.
3
I
DD
MEASUREMENT TAKEN WITH ALL INSTRUCTIONS EXECUTING FROM
INTERNAL MEMORY. 50% OF THE INSTRUCTIONS ARE MULTIFUNCTION
(TYPES 1, 4, 5, 12, 13, 14), 30% ARE TYPE 2 AND TYPE 6, AND 20% ARE
IDLE INSTRUCTIONS.
4
IDLE REFERS TO ADSP-2189M STATE OF OPERATION DURING EXECUTION
OF IDLE INSTRUCTION. DEASSERTED PINS ARE DRIVEN TO EITHER V
DD
OR GND.
12
POWER (P
IDLE
n) mW
20mW
15mW
14.25mW
15.7mW
16.4mW
24mW
IDLE (16)
IDLE (128)
IDLE
POWER, IDLE n MODES
2
1/t
CK
MHz
50 75
14
16
18
20
22
24
26
55 60 70 8065
14
POWER (P
IDLE
) mW
24mW
28mW
V
DD
= 2.65V
20mW
24mW
V
DD
= 2.5V
16.5mW
20mW
V
DD
= 2.35V
POWER, IDLE
1, 2, 4
1/t
CK
MHz
40
16
18
20
22
24
26
28
30
55 60 65 70 75 80
1/t
CK
MHz
50 80
60
82mW
70mW
61mW
95mW
82mW
2189L POWER, INTERNAL
1, 2, 3
110mW
POWER (P
INT
) mW
V
DD
= 2.65V
V
DD
= 2.5V
V
DD
= 2.35V
55
55 60 65 70 75
65
70
75
80
85
90
95
100
105
110
115
V
DD
= 2.65V
V
DD
= 2.35V
V
DD
= 2.5V
Figure 15. Power vs. Frequency
CAPACITIVE LOADING
Figure 16 and Figure 17 show the capacitive loading character-
istics of the ADSP-2189M.
C
L
pF
RISE TIME (0.4V2.4V) ns
30
3000
50
100 150 200 250
25
15
10
5
0
20
T = +85C
V
DD
= 0V TO 2.0V
Figure 16. Typical Output Rise Time vs. Load Capacitance,
C
L
(at Maximum Ambient Operating Temperature)
C
L
pF
14
0
VALID OUTPUT DELAY OR HOLD ns
50 100 150 250200
12
4
2
2
10
8
NOMINAL
16
18
6
4
6
Figure 17. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
L
(at Maximum Ambient Operating
Temperature)
V
DD
INTERNAL Volts
700
CURRENT A
2.25 2.35 2.5 2.752.65
600
300
200
100
500
400
800
900
0
657A
393A
131A
772A
475A
161A
TEMP = +85C
TEMP = +70C
TEMP = +25C
Figure 18. IDD Power-Down
REV. A
ADSP-2189M
18
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (t
DIS
) is the difference of t
MEASURED
and t
DECAY
,
as shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low
voltage level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage.
The decay time, t
DECAY
, is dependent on the capacitive load,
C
L
, and the current load, i
L
, on the output pin. It can be ap-
proximated by the following equation:
t
CV
i
DECAY
L
L
=
× 05.
from which
t
DIS
= t
MEASURED
t
DECAY
is calculated. If multiple pins (such as the data bus) are disabled,
the measurement value is that of the last pin to stop driving.
1.5V
OUTPUT
INPUT
1.5V
2.0V
0.8V
Figure 19. Voltage Reference Levels for AC Measurements
(Except Output Enable/Disable)
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to when they start
driving. The output enable time (t
ENA
) is the interval from when
a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
2.0V
1.0V
t
ENA
REFERENCE
SIGNAL
OUTPUT
t
DECAY
V
OH
(MEASURED)
OUTPUT STOPS
DRIVING
OUTPUT
STARTS
DRIVING
t
DIS
t
MEASURED
V
OL
(MEASURED)
V
OH
(MEASURED) 0.5V
V
OL
(MEASURED) +0.5V
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
OH
(MEASURED)
V
OL
(MEASURED)
Figure 20. Output Enable/Disable
TO
OUTPUT
PIN
50pF
+1.5V
I
OH
I
OL
Figure 21. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)

ADSP-2189MKCAZ-300

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital Signal Processors & Controllers - DSP, DSC 16B 75 MIPS 2.5V 2 Serial Prts Host Prt
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union