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9UMS9633BKLF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
IDT
TM
/ICS
TM
Ultra Mobile PC/Mobile Internet Device 1423—01/20/09
ICS9UMS9633B
ULTRA MOBILE PC/MOBILE INTERNET DEVICE
4
Advance Information
MLF Pin Configuration
CPUT0_LPR
CPUC0_LPR
VDDIO_1.5
GNDCPU
CPUT1_LPR
CPUC1_LPR
VDDCORE_3.3
VDDIO_1.5
GNDCPU
CPUT2_LPR
CPUC2_LPR
FSB_L
48 47 46 45 44 43 42 41 40 39 38 37
CPU_STOP#
1 36 *CR#2
CLKPWRGD#/PD_3.3
235
SRCT2_LPR
X2
334
SRCC2_LPR
X1
433
GNDSRC
VDDREF_3.3
532
SRCT1_LPR
REF
631
SRCC1_LPR
GNDREF
730
VDDIO_1.5
VDDCORE_3.3 8 29
VDDCORE_3.3
FSC_L
928
*CR#1
TEST_MODE
10 27
SRCT0_LPR
TEST_SEL
11 26
SRCC0_LPR
SCLK_3.3
12 25
GNDSRC
13 14 15 16 17 18 19 20 21 22 23 24
SDATA_3.3
VDDCORE_3.3
VDDIO_1.5
DOT96C_LPR
DOT96T_LPR
GNDDOT
GNDLCD
LCD100C_LPR
LCD100T_LPR
VDDIO_1.5
VDDCORE_3.3
*CR#0
* indicates inputs with internal pull up of ~10Kohm to 3.3V
48-pin MLF, 6x6 mm, 0.4mm pitch
ICS9UMS9633
IDT
TM
/ICS
TM
Ultra Mobile PC/Mobile Internet Device 1423—01/20/09
ICS9UMS9633B
ULTRA MOBILE PC/MOBILE INTERNET DEVICE
5
Advance Information
MLF Pin Description
PIN # PIN NAME TYPE DESCRIPTION
1 CPU_STOP# IN Stops all CPU clocks, except those set to be free running clocks
2 CLKPWRGD#/PD_3.3 IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs
are valid and are ready to be sampled. This is an active low input. / Asynchronous
active high input pin used to place the device into a power down state.
3X2 OUTCr
y
stal output, Nominall
y
14.318MHz
4 X1 IN Crystal input, Nominally 14.318MHz.
5 VDDREF_3.3 PWR Power pin for the XTAL and REF clocks, nominal 3.3V
6 REF OUT 14.318 MHz reference clock.
7 GNDREF PWR Ground pin for the REF outputs.
8 VDDCORE_3.3 PWR 3.3V power for the PLL core
9FSC_L IN
Low threshold input for CPU frequency selection. Refer to input electrical
characteristics for Vil_FS and Vih_FS values.
10 TEST_MODE IN
TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode
while in test mode. Refer to Test Clarification Table.
11 TEST_SEL IN
TEST_SEL: latched input to select TEST MODE
1 = All outputs are tri-stated for test
0 = All outputs behave normally.
12 SCLK_3.3 IN Clock pin of SMBus circuitr
y
, 3.3V tolerant.
13 SDATA_3.3 I/O Data pin for SMBus circuitry, 3.3V tolerant.
14 VDDCORE_3.3 PWR 3.3V power for the PLL core
15 VDDIO_1.5 PWR Power suppl
y
for low power differential outputs, nominal 1.5V.
16 DOT96C_LPR OUT
Complement clock of low power differential pair for 96.00MHz DOT clock. No 50ohm
resistor to GND needed. No Rs needed.
17 DOT96T_LPR OUT
True clock of low power differential pair for 96.00MHz DOT clock. No 50ohm resistor
to GND needed. No Rs needed.
18 GNDDOT PWR Ground pin for DOT clock output
19 GNDLCD PWR Ground pin for LCD clock output
20 LCD100C_LPR OUT
Complement clock of low power differential pair for LCD100 SS clock. No 50ohm
resistor to GND needed. No Rs needed.
21 LCD100T_LPR OUT
True clock of low power differential pair for LCD100 SS clock. No 50ohm resistor to
GND needed. No Rs needed.
22 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V.
23 VDDCORE_3.3 PWR 3.3V power for the PLL core
24 *CR#0 IN Clock request for SRC0, 0 = enable, 1 = disable
IDT
TM
/ICS
TM
Ultra Mobile PC/Mobile Internet Device 1423—01/20/09
ICS9UMS9633B
ULTRA MOBILE PC/MOBILE INTERNET DEVICE
6
Advance Information
MLF Pin Description (continued)
PIN # PIN NAME TYPE DESCRIPTION
25 GNDSRC PWR Ground pin for the SRC outputs
26 SRCC0_LPR OUT
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
27 SRCT0_LPR OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
28 *CR#1 IN Clock request for SRC1, 0 = enable, 1 = disable
29 VDDCORE_3.3 PWR 3.3V power for the PLL core
30 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V.
31 SRCC1_LPR OUT
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
32 SRCT1_LPR OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
33 GNDSRC PWR Ground pin for the SRC outputs
34 SRCC2_LPR OUT
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
35 SRCT2_LPR OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
36 *CR#2 IN Clock request for SRC2, 0 = enable, 1 = disable
37 FSB_L IN
Low threshold input for CPU frequency selection. Refer to input electrical
characteristics for Vil_FS and Vih_FS values.
38 CPUC2_LPR OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
39 CPUT2_LPR OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
40 GNDCPU PWR Ground pin for the CPU outputs
41 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V.
42 VDDCORE_3.3 PWR 3.3V power for the PLL core
43 CPUC1_LPR OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
44 CPUT1_LPR OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
45 GNDCPU PWR Ground pin for the CPU outputs
46 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V.
47 CPUC0_LPR OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
48 CPUT0_LPR OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

9UMS9633BKLF

Mfr. #:
Buy 9UMS9633BKLF
Manufacturer:
IDT
Description:
Clock Generators & Support Products PC MAIN CLOCK - LOW POWER - ATOM 3.3V
Lifecycle:
New from this manufacturer.
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