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MC68EC000CAA20

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
7
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
After the previous steps are completed, the MC68SEC000 will remain in the low-power mode until it
recognizes the appropriate interrupt . External logic will also have to poll IPLB2–IPLB0 to detect the proper
interrupt. When the correct interrupt level is received, the following steps will bring the processor out of the
low-power mode:
1. Restart the system clock if it was stopped.
2. Wait for the system clock to become stable.
3. Assert the RESTART signal. This will cause the processor’s clock to start on the next falling edge of
the system clock. Figure 6 shows the timing for bringing the processor out of the low-power mode.
Both the RESTART and RESET signals are subject to the asynchronous setup time as specified in
the Electrical Characteristics section of this addendum.
WARNING
The system clock must be stable before the RESTART
signal is asserted
to prevent glitches in the clock. An unstable clock can cause unpredictable
results in the MC68SEC000.
Figure 6. MC68SEC000 Clock Start Timing
4. If the MC68SEC000 was placed in a three-state condition, the BR signal must be negated before the
processor can begin executing instructions.
CLK
CPU_CLK
RESTART
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cale Semiconductor,
I
Freescale Semiconductor, Inc.
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8
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
An example trap routine is as follows:
TRAP_x MOVE.B #0,$low_power_address /* Write that causes ADDRESS_MATCH to assert */
STOP #$2000 /* STOP instruction with desired interrupt mask */
RTE /* Return from the exception */
The first instruction (MOVE.B #0,$low_power_address) writes a byte to the low-power address that will
cause the external circuitry to begin the sequence that will stop the processor’s clock. The second
instruction (STOP #$2000) loads the SR with the immediate data. This lets you set the interrupt that will
cause the processor to come out of the low-power mode. The final instruction (RTE) tells the processor to
return from the exception and resume normal processing.
3.0 MC68SEC000 ELECTRICAL SPECIFICATIONS
Add to the following table to Section 10.1.
3.1 MC68SEC000 MAXIMUM RATINGS
3.2 CMOS CONSIDERATIONS
The following change should be made to Section 10.4, CMOS Considerations.
“Although the MC68HC000 and MC68EC000 is implemented with input protection diodes, care should be
exercised to ensure that the maximum input voltage specification is not exceeded.” should read “Although
the MC68HC000, MC68EC000, and MC68SEC000 are implemented with input protection diodes, be
careful not to exceed the maximum input voltage specification.”
RATING SYMBOL VALUE UNIT
Supply Voltage V
CC
–0.3 to 6.5 V
Input Voltage V
in
–0.5 to 6.5 V
Maximum Operating
Temperature Range
Commercial Extended "C" Grade
T
A
T
L
to T
H
0 to 70
–40 to 85
°
C
Storage Temperature Tstg –55 to 150
°
C
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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9
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
4.0 MC68SEC000 AC ELECTRICAL SPECIFICATIONS
Replace Figure 10-2 on page 10-6 with Figure 7.
Figure 7. Drive Levels and Test Points for AC Specifications - applies to all parts
0.8 V
2.0 V
B
DRIVE TO
0.5 V
2.0 V
0.8 V
VALID
OUTPUT
n
VALID
OUTPUT
n + 1
2.0 V
0.8 V
2.0 V
0.8 V
2.0 V
0.8 V
VALID
OUTPUT
n
VALID
OUTPUT
n+1
2.0 V
0.8 V
B
A
VALID
INPUT
2.0 V
0.8 V
2.0 V
0.8 V
D
C
DRIVE TO
0.5 V
DRIVE TO
2.4 V
VALID
INPUT
2.0 V
0.8 V
2.0 V
0.8 V
D
C
DRIVE
TO 0.5 V
DRIVE
TO 2.4 V
2.0 V
0.8 V
2.0 V
0.8 V
F
CLK
OUTPUTS(1) CLK
OUTPUTS(2) CLK
INPUTS(3) CLK
INPUTS(4) CLK
ALL SIGNALS(5)
NOTES:
1. This output timing is applicable to all parameters specified relative to the rising edge of the clock.
2. This output timing is applicable to all parameters specified relative to the falling edge of the clock.
3. This input timing is applicable to all parameters specified relative to the rising edge of the clock.
4. This input timing is applicable to all parameters specified relative to the falling edge of the clock.
5. This timing is applicable to all parameters specified relative to the assertion/negation of another signal.
LEGEND:
A. Maximum output delay specification.
B. Minimum output hold time.
C. Minimum input setup time specification.
D. Minimum input hold time specification.
E. Signal valid to signal valid specification (maximum or minimum).
F. Signal valid to signal invalid specification (maximum or minimum).
DRIVE
TO 2.4 V
E
A
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

MC68EC000CAA20

Mfr. #:
Buy MC68EC000CAA20
Manufacturer:
NXP Semiconductors
Description:
IC MPU M680X0 20MHZ 64QFP
Lifecycle:
New from this manufacturer.
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