34 Copyright 2010 Cirrus Logic (All Rights Reserved) DS636F2
EP9301
Entry Level ARM9 System-on-Chip Processor
JTAG
Parameter Symbol Min Max Units
TCK clock period
t
clk_per
100 - ns
TCK clock high time
t
clk_high
50 - ns
TCK clock low time
t
clk_low
50 - ns
TMS / TDI to clock rising setup time
t
JPs
20 - ns
Clock rising to TMS / TDI hold time
t
JPh
45 - ns
JTAG port clock to output
t
JPco
-30ns
JTAG port high impedance to valid output
t
JPzx
-30ns
JTAG port valid output to high impedance
t
JPxz
-30ns
Figure 22. JTAG Timing Measurement
TDO
TCK
TDI
TMS
t
JPh
t
clk_high
t
clk_low
t
JPzx
t
JPco
t
JPxz
t
clk_per
t
JPs
DS636F2 Copyright 2010 Cirrus Logic (All Rights Reserved) 35
EP9301
Entry Level ARM9 System-on-Chip Processor
208 Pin LQFP Package Outline
2.19 208-Pin LQFP (28 × 28 × 1.40-mm Body)
NOTES:
1) Dimensions are in millimeters, and controlling dimension is millimeter.
2) Package body dimensions do not include mold protrusion, which is 0.25 mm (0.010 in).
3) Pin 1 identification may be either ink dot or dimple.
4) Package top dimensions can be smaller than bottom dimensions by 0.20 mm (0.008 in).
5) The ‘lead width with plating’ dimension does not include a total allowable dambar protrusion of 0.08 mm
(at maximum material condition).
6) Ejector pin marks in molding are present on every package.
7) Drawing above does not reflect exact package pin count.
Pin 1 Indicator
29.60 (1.165)
30.40 (1.197)
0.17 (0.007)
0.27 (0.011)
27.80 (1.094)
28.20 (1.110)
0.50
(0.0197)
BSC
29.60 (1.165)
30.40 (1.197)
27.80 (1.094)
28.20 (1.110)
1.35 (0.053)
1.45 (0.057)
0° MIN
7° MAX
0.09 (0.004)
0.20 (0.008)
1.40 (0.055)
0.45 (0.018)
0.75 (0.030)
0.05 (0.002)
1.00 (0.039) BSC
Pin 1
Pin 208
1.60 (0.063)
0.15 (0.006)
36 Copyright 2010 Cirrus Logic (All Rights Reserved) DS636F2
EP9301
Entry Level ARM9 System-on-Chip Processor
208 Pin LQFP Pinout
The following table shows the 208 pin LQFP pinout.
VDD_core is CVDD.
VDD_ring is RVDD.
NC means that the pin is not connected.
Pin List
The following Low-Profile Quad Flat Pack (LQFP) pin assignment table is sorted in order of pin.
Table P. Pin List in Numerical Order by Pin Number
Pin
Number
Pin
Name
Pin
Number
Pin
Name
Pin
Number
Pin
Name
Pin
Number
Pin
Name
Pin
Number
Pin
Name
Pin
Number
Pin
Name
1 CSn[7] 36 AD[5] 71 AD[9] 106 USBp[0] 141 EGPIO[10] 176 TXEN
2 CSn[6] 37 DA[12] 72 DA[1] 107 ABITCLK 142 EGPIO[9] 177 MIITXD[0]
3 CSn[3] 38 AD[4] 73 AD[8] 108 CTSn 143 EGPIO[8] 178 MIITXD[1]
4 CSn[2] 39 DA[11] 74 DA[0] 109 RXD[0] 144 EGPIO[7] 179 MIITXD[2]
5 CSn[1] 40 AD[3] 75 DSRn 110 RXD[1] 145 EGPIO[6] 180 MIITXD[3]
6 AD[25] 41 vdd_ring 76 DTRn 111 vdd_ring 146 EGPIO[5] 181 TXCLK
7 vdd_ring 42 gnd_ring 77 TCK 112 gnd_ring 147 EGPIO[4] 182 RXERR
8 gnd_ring 43 DA[10] 78 TDI 113 TXD[0] 148 EGPIO[3] 183 RXDVAL
9 AD[24] 44 AD[2] 79 TDO 114 TXD[1] 149 gnd_ring 184 MIIRXD[0]
10 SDCLK 45 DA[9] 80 TMS 115 CGPIO[0] 150 vdd_ring 185 MIIRXD[1]
11 AD[23] 46 AD[1] 81 vdd_ring 116 gnd_core 151 EGPIO[2] 186 MIIRXD[2]
12 vdd_core 47 DA[8] 82 gnd_ring 117 PLL_GND 152 EGPIO[1] 187 gnd_ring
13 gnd_core 48 AD[0] 83 BOOT[1] 118 XTALI 153 EGPIO[0] 188 vdd_ring
14 SDWEn 49 vdd_ring 84 BOOT[0] 119 XTALO 154 ARSTn 189 MIIRXD[3]
15 SDCSn[3] 50 gnd_ring 85 gnd_ring 120 PLL_VDD 155 TRSTn 190 RXCLK
16 SDCSn[2] 51 NC 86 NC 121 vdd_core 156 ASDI 191 MDIO
17 SDCSn[1] 52 NC 87 EECLK 122 gnd_ring 157 USBm[2] 192 MDC
18 SDCSn[0] 53 vdd_ring 88 EEDAT 123 vdd_ring 158 USBp[2] 193 RDn
19 vdd_ring 54 gnd_ring 89 ASYNC 124 RSTOn 159 WAITn 194 WRn
20 gnd_ring 55 AD[15] 90 vdd_core 125 PRSTn 160 EGPIO[15] 195 AD[16]
21 RASn 56 DA[7] 91 gnd_core 126 CSn[0] 161 gnd_ring 196 AD[17]
22 CASn 57 vdd_core 92 ASDO 127 gnd_core 162 vdd_ring 197 gnd_core
23 DQMn[1] 58 gnd_core 93 SCLK1 128 vdd_core 163 EGPIO[14] 198 vdd_core
24 DQMn[0] 59 AD[14] 94 SFRM1 129 gnd_ring 164 EGPIO[13] 199 HGPIO[2]
25 AD[22] 60 DA[6] 95 SSPRX1 130 vdd_ring 165 EGPIO[12] 200 HGPIO[3]
26 AD[21] 61 AD[13] 96 SSPTX1 131 ADC[4] 166 gnd_core 201 HGPIO[4]
27 vdd_ring 62 DA[5] 97 GRLED 132 ADC[3] 167 vdd_core 202 HGPIO[5]
28 gnd_ring 63 AD[12] 98 RDLED 133 ADC[2] 168 FGPIO[3] 203 gnd_ring
29 DA[15] 64 DA[4] 99 vdd_ring 134 ADC[1] 169 FGPIO[2] 204 vdd_ring
30 AD[7] 65 AD[11] 100 gnd_ring 135 ADC[0] 170 FGPIO[1] 205 AD[18]
31 DA[14] 66 vdd_ring 101 INT[3] 136 ADC_VDD 171 gnd_ring 206 AD[19]
32 AD[6] 67 gnd_ring 102 INT[1] 137 RTCXTALI 172 vdd_ring 207 AD[20]
33 DA[13] 68 DA[3] 103 INT[0] 138 RTCXTALO 173 CLD 208 SDCLKEN
34 vdd_core 69 AD[10] 104 RTSn 139 ADC_GND 174 CRS
35 gnd_core 70 DA[2] 105 USBm[0] 140 EGPIO[11] 175 TXERR

EP9301-CQZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Microprocessors - MPU IC Entry-Level ARM9 SOC Processor
Lifecycle:
New from this manufacturer.
Delivery:
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