Integrated Silicon Solution, Inc. — www.issi.com 7
Rev. C
05/29/2013
IS62WV12816DALL/DBLL, IS65WV12816DALL/DBLL
AC TEST CONDITIONS
Parameter  IS62/65WV12816DALL  IS62/65WV12816DBLL 
(Unit)  (Unit)
Input Pulse Level 0.4V to Vdd-0.2V 0.4V to Vdd-0.3V
Input Rise and Fall Times 1V/1ns 1V/1ns
Input and Output Timing Vref Vref
and Reference Level
Output Load See Figures 1 and 2 See Figures 1 and 2
AC TEST LOADS
Figure 1 Figure 2
1.8V ± 10%   2.5V - 3.6V
R1(Ω) 3070 3070
R2(Ω) 3150 3150
VRef 0.9V 1.5V
Vtm 1.8V 2.8V
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
R1
30 pF
Including
jig and
scope
R2
OUTPUT
VTM
IS62WV12816DALL/DBLL, IS65WV12816DALL/DBLL
8 Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
05/29/2013
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
35 ns  45 ns  55 ns 
Symbol  Parameter  Min. Max. Min. Max. Min. Max. Unit
trc Read Cycle Time 35 45 55 ns
tAA Address Access Time 35 45 55 ns
toHA Output Hold Time 10 10 10 ns
tAcS1/tAcS2 CS1/CS2 Access Time 35 45 55 ns
tdoe OE Access Time 15 20 25 ns
tHzoe
(2)
OE to High-Z Output 10 15 20 ns
tLzoe
(2)
OE to Low-Z Output 5 5 5 ns
tHzcS1/tHzcS2
(2)
CS1/CS2 to High-Z Output 0 10 0 15 0 20 ns
tLzcS1/tLzcS2
(2)
CS1/CS2 to Low-Z Output 10 10 10 ns
tBA LB, UB Access Time 35 45 55 ns
tHzB LB, UB to High-Z Output 0 10 0 15 0 20 ns
tLzB LB, UB to Low-Z Output 0 0 0 ns
Notes:
1. Test conditions and output loading conditions are specified in the AC Test Conditions and AC Test Loads (Figure 1).
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com 9
Rev. C
05/29/2013
IS62WV12816DALL/DBLL, IS65WV12816DALL/DBLL
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
DOUT
ADDRESS
AC WAVEFORMS
READ CYCLE NO. 1
(1,2) 
(Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH, UB or LB = VIL)
AC WAVEFORMS
READ CYCLE NO. 2
(1,3)
(CS1, CS2, OE, AND UB/LB Controlled)
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1, UB, or LB =
VIL. cS2=WE=VIH.
3. Address is valid prior to or coincident with CS1 LOW transition.

IS62WV12816DBLL-45BLI

Mfr. #:
Manufacturer:
ISSI
Description:
SRAM 2Mb A128K x 1645ns Async SRAM
Lifecycle:
New from this manufacturer.
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