Si5022/Si5023
Rev. 1.23 11
Input Reference Clock Frequency
Tolerance
C
TOL
–100 — 100 ppm
Frequency Difference at which
Receive PLL goes out of Lock
(REFCLK compared to the divided
down VCO clock)
450 600 750 ppm
Frequency Difference at which
Receive PLL goes into Lock
(REFCLK compared to the divided
down VCO clock)
150 300 450 ppm
*Note: As defined in Bellcore specifications: GR-253-CORE, Issue 3, September 2000. Using PRBS 2
23
– 1 data pattern.
Table 5. Absolute Maximum Ratings
Parameter Symbol Value Unit
DC Supply Voltage V
DD
–0.5 to 2.8 (Si5022)
–0.5 to 3.5 (Si5023)
V
LVTTL Input Voltage V
DIG
–0.3 to 3.6 V
Differential Input Voltages V
DIF
–0.3 to (V
DD
+ 0.3) V
Maximum Current any output PIN ±50 mA
Operating Junction Temperature T
JCT
–55 to 150 °C
Storage Temperature Range T
STG
–55 to 150 °C
ESD HBM Tolerance (100 pf, 1.5 kΩ)1kV
Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 6. Thermal Characteristics
Parameter Symbol Test Condition Value Unit
Thermal Resistance Junction to Ambient ϕ
JA
Still Air 38 °C/W
Table 4. AC Characteristics (PLL Characteristics)
(V
DD
= 2.5 V ±5% for Si5022 or 3.3 V ±5% for Si5023, T
A
= –40 to 85 °C)
Parameter Symbol Test Condition Min Typ Max Unit
