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AD7709ARUZ-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33
REV. A
AD7709
–15–
Status Register (A1, A0 = 0, 0; Power-On-Reset = 00H)
The ADC Status Register is an 8-bit read-only register. To access the ADC Status Register, the user must write to the Communica-
tions Register, selecting the next operation to be a read and load bits A1–A0 with 0, 0. Table VI outlines the bit designations for the
Status Register. SR0 to SR7 indicate the bit location, SR denoting the bits are in the Status Register. SR7 denotes the first bit of the
data stream. The number in brackets indicates the power-on-reset default status of that bit.
Table VI. Status Register Bit Designations
Bit Bit
Location Name Description
SR7 RDY Ready Bit for ADC.
Set when data is written to the ADC data register.
The RDY bit is cleared automatically after the ADC data register has been read or a period of time before
the data register is updated with a new conversion result.
SR6 0This bit is automatically cleared.
SR5 0This bit is automatically cleared.
SR4 0This bit is automatically cleared.
SR3 ERR ADC Error Bit. This bit is set at the same time as the RDY bit.
Set to indicate that the result written to the ADC data register has been clamped to all zeros or all ones.
Error sources include Overrange, Underrange.
Cleared by a write to the mode bits to initiate a conversion.
SR2 0This bit is automatically cleared.
SR1 STBY Standby Bit Indication.
When this bit is set, the AD7709 is in power-down mode.
This bit is cleared when the ADC is powered up.
SR0 LOCK PLL Lock Status Bit.
Set if the PLL has locked onto the 32.768 kHz crystal oscillator clock. If the user is worried about exact
sampling frequencies, etc., the LOCK bit should be interrogated and the result discarded if the LOCK
bit is 0.
7RS6RS5RS4RS3RS2RS1RS0RS
)0(YDR)0(0)0(0)0(0)0(RRE)0(0)0(YBTS)0(KCOL
REV. A
AD7709
–16–
Table VII. Configuration Register Bit Designations
Bit Bit
Location Name Description
CONFIG23 PSW2 Power Switch 2 Control Bit.
Set by user to enable power switch SW2/P2 to PWRGND.
Cleared by user to enable use as a standard I/O pin. When the ADC is in standby mode, the power switches
are open.
CONFIG22 PSW1 Power Switch 1 Control Bit.
Set by user to enable power switch SW1/P1 to PWRGND.
Cleared by user to enable use as a standard I/O pin. When the ADC is in standby mode, the power switches
are open.
CONFIG21 I3EN1 IEXC3 Current Source Enable Bit
CONFIG20 I3EN0 IEXC3 Current Source Enable Bit
CONFIG19 I2EN1 IEXC2 Current Source Enable Bit
CONFIG18 I2EN0 IEXC2 Current Source Enable Bit
CONFIG17 I1EN1 IEXC1 Current Source Enable Bit
Configuration Register (A1, A0 = 0, 1; Power-On-Reset = 000007H)
The Configuration Register is a 24-bit register from which data can either be read or to which data can be written. This register is used to
select the input channel and configure the input range, excitation current sources, and I/O port. Table VII outlines the bit designations
for this register. CONFIG23 to CONFIG0 indicate the bit location, CONFIG denoting the bits are in the Configuration Register.
CONFIG23 denotes the first bit of the data stream. The number in brackets indicates the power-on-reset default status of that bit. A
write to the Configuration Register has immediate effect and does not reset the ADC. Therefore, if a current source is switched
while the ADC is converting, the user will have to wait for the full settling time of the sinc
3
filter before obtaining a fully settled output.
This equates to three outputs.
7GIFNOC7GIFNOC
7GIFNOC
7GIFNOC7GIFNOC6GIFNOC6GIFNOC
6GIFNOC
6GIFNOC6GIFNOC5GIFNOC5GIFNOC
5GIFNOC
5GIFNOC5GIFNOC4GIFNOC4GIFNOC
4GIFNOC
4GIFNOC4GIFNOC3GIFNOC3GIFNOC
3GIFNOC
3GIFNOC3GIFNOC2GIFNOC2GIFNOC
2GIFNOC
2GIFNOC2GIFNOC1GIFNOC1GIFNOC
1GIFNOC
1GIFNOC1GIFNOC0GIFNOC0GIFNOC
0GIFNOC
0GIFNOC0GIFNOC
)0(LESFER)0(LESFER
)0(LESFER
)0(LESFER)0(LESFER)0(2HC)0(2HC
)0(2HC
)0(2HC)0(2HC)0(1HC)0(1HC
)0(1HC
)0(1HC)0(1HC)0(0HC)0(0HC
)0(0HC
)0(0HC)0(0HC)0(INU)1(2NR)1(1NR)1(0NR
32GIFNOC32GIFNOC
32GIFNOC
32GIFNOC32GIFNOC22GIFNOC22GIFNOC
22GIFNOC
22GIFNOC22GIFNOC12GIFNOC12GIFNOC
12GIFNOC
12GIFNOC12GIFNOC02GIFNOC02GIFNOC
02GIFNOC
02GIFNOC02GIFNOC91GIFNOC91GIFNOC
91GIFNOC
91GIFNOC91GIFNOC81GIFNOC81GIFNOC
81GIFNOC
81GIFNOC81GIFNOC71GIFNOC71GIFNOC
71GIFNOC
71GIFNOC71GIFNOC61GIFNOC61GIFNOC
61GIFNOC
61GIFNOC61GIFNOC
)0(2WSP)0(2WSP
)0(2WSP
)0(2WSP)0(2WSP)0(1WSP)0(1WSP
)0(1WSP
)0(1WSP)0(1WSP)0(1NE3I)0(1NE3I
)0(1NE3I
)0(1NE3I)0(1NE3I)0(0NE3I)0(0NE3I
)0(0NE3I
)0(0NE3I)0(0NE3I)0(1NE2I)0(1NE2I
)0(1NE2I
)0(1NE2I)0(1NE2I)0(0NE2I)0(0NE2I
)0(0NE2I
)0(0NE2I)0(0NE2I)0(1NE1I)0(1NE1I
)0(1NE1I
)0(1NE1I)0(1NE1I)0(0NE1I)0(0NE1I
)0(0NE1I
)0(0NE1I)0(0NE1I
I2EN1 I2EN0 Function
00IEXC2 Current Source OFF
01IEXC2 Current Source Routed to the IOUT1 Pin
10IEXC2 Current Source Routed to the IOUT2 Pin
11Reserved
I3EN1 I3EN0 Function
00IEXC3 Current Source OFF
01IEXC3 Current Source Routed to the IOUT1 Pin
10IEXC3 Current Source Routed to the IOUT2 Pin
11Reserved
51GIFNOC41GIFNOC31GIFNOC21GIFNOC11GIFNOC01GIFNOC9GIFNOC8GIFNOC
)0(GID4P)0(GID3P)0(NE2P)0(NE1P)0(TAD4P)0(TAD3P)0(TAD2P)0(TAD1P
REV. A
AD7709
–17–
Bit Bit
Location Name Description
CONFIG16 I1EN0 IEXC1 Current Source Enable Bit
CONFIG15 P4DIG Digital Input Enable.
Set by user to enable pin AIN4/P4 as a digital input. A weak pull-up resistor is activated in this state.
Cleared by user to configure pin AIN4/P4 as an analog input.
CONFIG14 P3DIG Digital Input Enable.
Set by user to enable pin AIN3/P3 as a digital input. A weak pull-up resistor is activated in this state.
Cleared by user to configure pin AIN3/P3 as an analog input.
CONFIG13 P2EN SW2/P2 Digital Output Enable Bit.
Set by user to enable P2 as a regular digital output pin.
Cleared by user to three-state the P2 output. PSW2 takes precedence over P2EN.
CONFIG12 P1EN SW1/P1 Digital Output Enable Bit.
Set by user to enable P1 as a regular digital output pin.
Cleared by user to three-state the P1 output. PSW1 takes precedence over P1EN.
CONFIG11 P4DAT Digital Input Port Data Bit.
P4DAT is read only and will return a zero if P4DIG equals zero.
If P4 is enabled as a digital input, the readback value indicates the status of pin P4.
CONFIG10 P3DAT Digital Input Port Data Bit.
P3DAT is read only and will return a zero if P3DIG equals zero.
If P3 is enabled as a digital input, the readback value indicates the status of pin P3.
CONFIG9 P2DAT Digital Output Port Data Bit. P2 is a digital output only. When the port is active as an output (P2EN = 1),
the value written to this data bit appears at the output port. Reading P2DAT will return the last value
written to the P2DAT bit.
CONFIG8 P1DAT Digital Output Port Data Bit. P1 is a digital output only. When the port is active as an output (P1EN = 1),
the value written to this data bit appears at the output port. Reading P1DAT will return the last value
written to the P1DAT bit.
CONFIG7 REFSEL ADC Reference Input Select.
Cleared by the user to select REFIN1(+) and REFIN1(–) as the ADC reference.
Set by the user to select REFIN2(+) and REFIN2(–) as the ADC reference.
CONFIG6 CH2 ADC Input Channel Selection Bit. It is used in conjunction with CH1 and CH0 as shown below.
CONFIG5 CH1 ADC Input Channel Selection Bit. It is used in conjunction with CH2 and CH0 as shown below.
CONFIG4 CH0 ADC Input Channel Selection Bit. It is used in conjunction with CH2 and CH1 as shown below.
The Buffer column indicates if the analog inputs are buffered or unbuffered. This determines the common-mode input range
on each input. If the input is unbuffered (AINCOM), the common-mode input includes ground.
Table VII. Configuration Register Bit Designations (continued)
CH2 CH1 CH0 Positive Input Negative Input Buffer
0 00AIN1 AINCOM Positive Analog Input
0 01AIN2 AINCOM Positive Analog Input
0 10AIN3 AINCOM Positive Analog Input
0 11AIN4 AINCOM Positive Analog Input
1 00AIN1 AIN2 Positive and Negative Analog Inputs
1 01AIN3 AIN4 Positive and Negative Analog Inputs
1 10AINCOM AINCOM None
1 11AIN2 AIN2 Positive and Negative Analog Inputs
I1EN1 I1EN0 Function
00IEXC1 Current Source OFF
01IEXC1 Current Source Routed to the IOUT1 Pin
10IEXC1 Current Source Routed to the IOUT2 Pin
11Reserved
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33

AD7709ARUZ-REEL7

Mfr. #:
Buy AD7709ARUZ-REEL7
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16-Bit w/ Current Sources
Lifecycle:
New from this manufacturer.
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