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NCP4304ADR2G

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NCP4304A, NCP4304B
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25
Figure 60. Typical Application Schematic when NCP4304A/B is Used in CCM Flyback Converter
FLYBACK
CONTROL
CIRCUITRY
FB CS
DRV
V
CC
+
+
C2
R5
C3
D3
C4
D4
M1
R6
OK1
TR1
M2
R7
R11
D5
C5
VCC
MIN_TOFF
MIN_TON
TRIG/DIS CS
COMP
GND
DRV
C7
+
+Vout
GND
R9
R10
Vbulk
TR2
C6
D1
D2
C1
Q1
Q2
R1
R2
R3
R4
Delay Generator
t
on_min
and t
off_min
Adjustment
The NCP4304A/B offers adjustable minimum ON and
OFF time periods that ease the implementation of the
synchronous rectification system in a power supply. These
timers avoid false triggering on the CS input after the
MOSFET is turned on or off. The adjustment is based on an
internal timing capacitance and external resistors connected
to the GND pin – refer to Figure 61 for better understanding.
Figure 61. Internal Circuitry of t
on_min
Generator (t
off_min
Generator Works in the Same Way)
−
+
−
+
MIN_TON
GND
Vdd
V
REF
To Internal Logic
Ct
Discharge
Switch
t
on_min
I
RMIN_TON
I
RMIN_TON
R
MIN_TON
Current through the R
MIN_TON
adjust resistor can be
calculated as:
I
RMIN_TON
+
V
REF
R
MIN_TON
(eq. 4)
As the same current is used for the internal timing
capacitor (C
t
) charging, one can calculate the minimum
on-time duration using this equation.
t
on_min
+ C
t
@
V
REF
I
RMIN_TON
+ C
t
@
V
REF
V
REF
R
MIN_TON
(eq. 5)
+ C
t
@ R
MIN_TON
As can be seen from Equation 5, the minimum ON and
OFF times are independent of the V
REF
or VCC level. The
NCP4304A, NCP4304B
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26
internal capacitor size would be too high if we would use
directly I
RMIN_TON
current thus this current is decreased by
the internal current mirror ratio. One can then estimate
minimum t
on
and t
off
blanking periods from measured
values in Figures 62 and 63.
Figure 62. MIN_TON Adjust Characteristic Figure 63. MIN_TOFF Adjust Characteristic
0
1
2
3
4
5
6
0 102030405060
R
MIN_TON
(kW)
t
on_min
(ms)
0
1
2
3
4
5
6
0 102030405060
R
MIN_TOFF
(kW)
t
off_min
(ms)
The absolute minimum t
on
duration is internally clamped
to 130 ns and minimum t
off
duration to 600 ns in order to
prevent any potential issues with the minimum t
on
and/or t
off
input being shorted to GND.
Some applications may require adaptive minimum on and
off time blanking periods. With NCP4304A/B it is possible
to modulate blanking periods by using an external NPN
transistor − refer to Figure 64. The modulation signal can be
derived based on the load current or feedback regulator
voltage.
Figure 64. Possible Connection for t
on_min
and t
off_min
Modulation
−
+
−
+
t
on_min
Modulation
Voltage Input
MIN_TON
GND
Vdd
V
REF
To Internal Logic
Ct
Discharge
Switch
t
on_min
Modulation Current
I
RMIN_TON
I
RMIN_TON
R
MIN_TON
In LLC applications with a very wide operating frequency
range it is necessary to have very short minimum on time and
off time periods in order to reach the required maximum
operating frequency. However, when a LLC converter
operates under low frequency, the minimum off time period
may then be too short. To overcome possible issues with the
LLC operating under low line and light load conditions, one
can prolong the minimum off time blanking period by using
resistors R
DRAIN1
and R
DRAIN2
connected from the
opposite SR MOSFET drain – refer to Figure 65.
NCP4304A, NCP4304B
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27
Figure 65. Possible Connection for t
off_min
Prolongation in LLC Application with
Wide Operating Frequency Range
+Vbulk
+
LLC
STAGE
CONTROL
M1
M2
C1
N1
N2
N3
M3
M4
C4
C2
C3
D1
RTN
+Vout
OK1
R
MIN_TOFF
R
MIN_TON
R
MIN_TOFF
R
MIN_TON
CS
COMP
GND
DRV
VCC
MIN_TOFF
MIN_TON
TRIG/DIS CS
COMP
GND
DRV
TR1
L
COMP1
L
COMP2
Trig from Primary
(Option for LLC)
R
DRAIN2
R
DRAIN1
Note: L
COMP1,
2
are optional for MOSFETs with leads.
VCC
MIN_TOFF
MIN_TON
TRIG/DIS
Note that R
DRAIN1
and R
DRAIN2
should be designed in
such a way that the maximum pulse current into the
MIN_TOFF adjust pin is below 10 mA. Voltage on the
MIN_TOFF and MIN_TON pins is clamped by internal
zener protection to 10 V.
Power Dissipation Calculation
It is important to consider the power dissipation in the
MOSFET driver of a SR system. If no external gate resistor
is used and the internal gate resistance of the MOSFET is
very low, nearly all energy losses related to gate charge are
dissipated in the driver. Thus it is necessary to check the SR
driver power losses in the target application to avoid over
temperature and to optimize efficiency.
In SR systems the body diode of the SR MOSFET starts
conducting before turn on because the V
th_cs_on
threshold
level is below 0 V. On the other hand, the SR MOSFET turn
off process always starts before the drain to source voltage
rises up significantly. Therefore, the MOSFET switch
always operates under Zero Voltage Switching (ZVS)
conditions when implemented in a synchronous
rectification system.
The following steps show how to approximately calculate
the power dissipation and DIE temperature of the
NCP4304A/B controller. Note that real results can vary due
to the effects of the PCB layout on the thermal resistance.
Step 1 – MOSFET Gate-to-Source Capacitance:
During ZVS operation the gate to drain capacitance does
not have a Miller effect like in hard switching systems
because the drain to source voltage is close to zero and its
change is negligible.
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NCP4304ADR2G

Mfr. #:
Buy NCP4304ADR2G
Manufacturer:
ON Semiconductor
Description:
Switching Controllers SEC SIDE SYNC RECT DRV
Lifecycle:
New from this manufacturer.
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