TJA1052I All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 5 — 29 January 2018 13 of 27
NXP Semiconductors
TJA1052i
Galvanically isolated high-speed CAN transceiver
11. Dynamic characteristics
[1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[2] See Figure 5
.
[3] Referenced to GND1. Minimum value of 0.8 ms required according to SAE J2284; 0.3 ms is allowed according to ISO11898-2:2016 for
legacy devices.
[4] V
I
is the input voltage on TXD. See Figure 7 for test setup.
[5] The start-up time is the time from the application of power to valid data at the output. Guaranteed by design.
Table 12. Dynamic characteristics
T
vj
=
40
C to +150
C; V
DD1
= 3.0 V to 5.25 V with respect to GND1; V
DD2
= 4.75 V to 5.25 V with respect to GND2;
R
L
=60
unless otherwise specified
[1]
.
Symbol Parameter Conditions Min Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 4
t
d(TXD-busdom)
delay time from TXD to bus dominant Normal mode - 72 120 ns
t
d(TXD-busrec)
delay time from TXD to bus recessive Normal mode - 97 120 ns
t
d(busdom-RXD)
delay time from bus dominant to RXD Normal mode - 67 130 ns
t
d(busrec-RXD)
delay time from bus recessive to RXD Normal mode - 72 130 ns
t
d(TXDL-RXDL)
delay time from TXD LOW to RXD LOW Normal mode 72 - 220 ns
t
d(TXDH-RXDH)
delay time from TXD HIGH to RXD HIGH Normal mode 72 - 220 ns
t
bit(bus)
transmitted recessive bit width t
bit(TXD)
= 500 ns
[2]
435 - 530 ns
t
bit(TXD)
= 200 ns
[2]
155 - 210 ns
t
bit(RXD)
bit time on pin RXD t
bit(TXD)
= 500 ns
[2]
400 - 550 ns
t
bit(TXD)
= 200 ns
[2]
120 - 220 ns
t
rec
receiver timing symmetry t
bit(TXD)
= 500 ns 65 - +40 ns
t
bit(TXD)
= 200 ns 45 - +15 ns
t
to(dom)TXD
TXD dominant time-out time V
TXD
= 0 V; Normal mode
[3]
0.3 1.7 5 ms
t
to(dom)bus
bus dominant time-out time Standby mode 0.3 2 5 ms
CMTI common-mode transient immunity V
I
=V
DD1
or V
I
=0 V
[4]
20 45 - kV/s
t
startup
start-up time
[5]
-- 500s
t
fltr(wake)bus
bus wake-up filter time Standby mode 0.5 1 3 s
t
d(stb-norm)
standby to normal mode delay time 7 25 47 s
TJA1052I All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 5 — 29 January 2018 14 of 27
NXP Semiconductors
TJA1052i
Galvanically isolated high-speed CAN transceiver
Fig 4. CAN transceiver timing diagram
Fig 5. CAN FD timing definitions according to ISO 11898-2:2016
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TJA1052I All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 5 — 29 January 2018 15 of 27
NXP Semiconductors
TJA1052i
Galvanically isolated high-speed CAN transceiver
12. Application information
Isolated CAN applications are becoming increasingly common in electric and hybrid
electric vehicles. The TJA1052i is the ideal solution in applications that require an isolated
CAN node, such as Li-ion battery management, regenerative braking and 48 V-to-12 V
level shifting. The device can also be used to isolate high-voltage on-demand pumps and
motors in belt elimination projects.
If the TJA1052i is used in a HS-CAN network that supports remote bus wake-up, the
power-down sequence of the supplies must be managed properly to avoid a dominant
pulse on the CAN bus. V
DD2
should pass the minimum undervoltage threshold
(V
uvd(stb)(VDD2)
(min)) before V
DD1
falls below its maximum undervoltage detection
threshold (V
uvd(VDD1)(max)
). Power-up sequencing can happen in any order.
Digital inputs and outputs are 3 V compliant, allowing the TJA1052i to interface directly
with 3 V and 5 V microcontrollers.
12.1 Application hints
Further information on the application of the TJA1052i can be found in NXP application
hints AH1301 Application Hints -
TJA1052iGalvanicIsolatedHighSpeedCANTransceiver.
13. Test information
13.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive applications.
(1) Optional, depends on regulator.
Fig 6. Typical application with TJA1052i and a 5 V microcontroller.
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TJA1052IT/5Y

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
CAN Interface IC CAN Transceiver High Speed
Lifecycle:
New from this manufacturer.
Delivery:
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