1. General description
CBTL02042A/B is a 2 differential channel, 2-to-1 multiplexer/demultiplexer switch for PCI
Express Generation 2 (Gen2), and other high-speed serial interface applications. The
CBTL02042A/B can switch two differential signals to one of two locations. Using a unique
design technique, NXP has minimized the impedance of the switch such that the
attenuation observed through the switch is negligible, and also minimized the
channel-to-channel skew as well as channel-to-channel crosstalk, as required by the
high-speed serial interface. CBTL02042A/B allows expansion of existing high speed ports
for extremely low power.
The device's pinouts are optimized to match different application layouts. CBTL02042A
has input and output pins on the opposite of the package, and is suitable for edge
connector(s) with different signal sources on the motherboard. CBTL02042B has outputs
on both sides of the package, and the device can be placed between two connectors to
multiplex differential signals from a controller. Please refer to Section 8
for layout
examples.
2. Features and benefits
2 bidirectional differential channel, 2 : 1 multiplexer/demultiplexer
High-speed signal switching for PCIe Gen2 5 Gbit/s
High bandwidth: 7 GHz at 3dB
Low insertion loss:
0.5 dB at 100 MHz
1.2 dB at 2.5 GHz
Low intra-pair skew: 5 ps typical
Low inter-pair skew: 35 ps maximum
Low crosstalk: 30 dB at 2.5 GHz
Low off-state isolation: 25 dB at 2.5 GHz
Low return loss: 20 dB at 2.5 GHz
V
DD
operating range: 3.3 V ± 10 %
Shutdown pin (XSD) for power-saving mode
Standby current less than 1 μA
ESD tolerance:
8kV HBM
1 kV CDM
DHVQFN20 package
CBTL02042A; CBTL02042B
3.3 V, 2 differential channel, 2 : 1 multiplexer/demultiplexer
switch for PCI Express Gen2
Rev. 1 — 10 March 2011 Product data sheet
CBTL02042A_CBTL02042B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 10 March 2011 2 of 16
NXP Semiconductors
CBTL02042A; CBTL02042B
3.3 V, 2 differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen2
3. Applications
Routing of high-speed differential signals with low signal attenuation
PCIe Gen2
DisplayPort 1.2
USB 3.0
SATA 6 Gbit/s
4. Ordering information
[1] Total height after printed-circuit board mounting = 1.0 mm maximum.
5. Functional diagram
Table 1. Ordering information
Type number Package
Name Description Version
CBTL02042ABQ DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat
package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm
[1]
SOT764-1
CBTL02042BBQ DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat
package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm
[1]
SOT764-1
Fig 1. Functional diagram of CBTL02042A; CBTL02042B
002aaf07
3
B0_P
B0_N
B1_P
B1_N
A0_P
A0_N
A1_P
A1_N
C0_P
C0_N
C1_P
C1_N
SEL
XSD
CBTL02042A_CBTL02042B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 10 March 2011 3 of 16
NXP Semiconductors
CBTL02042A; CBTL02042B
3.3 V, 2 differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen2
6. Pinning information
6.1 Pinning
6.2 Pin description
a. CBTL02042A b. CBTL02042B
Fig 2. Pin configuration for DHVQFN20
002aaf761
CBTL02042A
Transparent top view
C1_N
A1_N
SEL
C1_P
A1_P C0_N
V
DD
C0_P
GND B1_N
A0_N B1_P
A0_P B0_N
XSD B0_P
V
DD
GND
V
DD
GND
9
12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10
11
1
20
terminal 1
index area
002aaf762
CBTL02042B
Transparent top view
SEL
C1_P
C1_N
B1_N
A1_N B1_P
A1_P GND
C0_N V
DD
C0_P B0_N
A0_N B0_P
A0_P XSD
GND
V
DD
GND
V
DD
9
12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10
11
1
20
terminal 1
index area
Table 2. Pin description
Symbol Pin Type Description
CBTL02042A CBTL02042B
A0_P 3 2 I/O channel 0, port A differential signal
input/output
A0_N 4 3 I/O
A1_P 7 6 I/O channel 1, port A differential signal
input/output
A1_N 8 7 I/O
B0_P 19 18 I/O channel 0, port B differential signal
input/output
B0_N 18 17 I/O
B1_P 17 14 I/O channel 1, port B differential signal
input/output
B1_N 16 13 I/O
C0_P 15 4 I/O channel 0, port C differential signal
input/output
C0_N 14 5 I/O
C1_P 13 8 I/O channel 1, port C differential signal
input/output
C1_N 12 9 I/O
SEL 9 12 CMOS
single-ended
input
operation mode select
SEL = LOW: A B
SEL = HIGH: A C

CBTL02042ABQ,115

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Multiplexer Switch ICs 3.3V 2 DIFF CH 2:1 MULTI/DEMUX SW
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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