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89HPES16H16ZABL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
4 of 36 October 3, 2011
IDT 89HPES16H16 Data Sheet
PE3RP[0]
PE3RN[0]
I PCI Express Port 3 Serial Data Receive. Differential PCI Express receive pair for
port 3.
PE3TP[0]
PE3TN[0]
O PCI Express Port 3 Serial Data Transmit. Differential PCI Express transmit pair for
port 3.
PE4RP[0]
PE4RN[0]
I PCI Express Port 4 Serial Data Receive. Differential PCI Express receive pair for
port 4.
PE4TP[0]
PE4TN[0]
O PCI Express Port 4 Serial Data Transmit. Differential PCI Express transmit pair for
port 4.
PE5RP[0]
PE5RN[0]
I PCI Express Port 5 Serial Data Receive. Differential PCI Express receive pair for
port 5.
PE5TP[0]
PE5TN[0]
O PCI Express Port 5 Serial Data Transmit. Differential PCI Express transmit pair for
port 5.
PE6RP[0]
PE6RN[0]
I PCI Express Port 6 Serial Data Receive. Differential PCI Express receive pair for
port 6.
PE6TP[0]
PE6TN[0]
O PCI Express Port 6 Serial Data Transmit. Differential PCI Express transmit pair for
port 6.
PE7RP[0]
PE7RN[0]
I PCI Express Port 7 Serial Data Receive. Differential PCI Express receive pair for
port 7.
PE7TP[0]
PE7TN[0]
O PCI Express Port 7 Serial Data Transmit. Differential PCI Express transmit pair for
port 7.
PE8RP[0]
PE8RN[0]
I PCI Express Port 8 Serial Data Receive. Differential PCI Express receive pair for
port 8.
PE8TP[0]
PE8TN[0]
O PCI Express Port 8 Serial Data Transmit. Differential PCI Express transmit pair for
port 8.
PE9RP[0]
PE9RN[0]
I PCI Express Port 9 Serial Data Receive. Differential PCI Express receive pair for
port 9.
PE9TP[[0]
PE9TN[0]
O PCI Express Port 9 Serial Data Transmit. Differential PCI Express transmit pair for
port 9.
PE10RP[0]
PE10RN[0]
I PCI Express Port 10 Serial Data Receive. Differential PCI Express receive pair for
port 10.
PE10TP[0]
PE10TN[0]
O PCI Express Port 10 Serial Data Transmit. Differential PCI Express transmit pair for
port 10.
PE11RP[0]
PE11RN[0]
I
PCI Express Port 11 Serial Data Receive. Differential PCI Express receive pair for
port 11.
PE11TP[0]
PE11TN[0]
O PCI Express Port 11 Serial Data Transmit. Differential PCI Express transmit pair for
port 11.
PE12RP[0]
PE12RN[0]
I PCI Express Port 12 Serial Data Receive. Differential PCI Express receive pair for
port 12.
PE12TP[0]
PE12TN[0]
O PCI Express Port 12 Serial Data Transmit. Differential PCI Express transmit pair for
port 12.
PE13RP[0]
PE13RN[0]
I PCI Express Port 13 Serial Data Receive. Differential PCI Express receive pair for
port 13.
PE13TP[0]
PE13TN[0]
O PCI Express Port 13 Serial Data Transmit. Differential PCI Express transmit pair for
port 13. W
Signal Type Name/Description
Table 2 PCI Express Interface Pins (Part 2 of 3)
5 of 36 October 3, 2011
IDT 89HPES16H16 Data Sheet
PE14RP[0]
PE14RN[0]
I PCI Express Port 14 Serial Data Receive. Differential PCI Express receive pair for
port 14.
PE14TP[0]
PE14TN[0]
O PCI Express Port 14 Serial Data Transmit. Differential PCI Express transmit pair for
port 14.
PE15RP[0]
PE15RN[0]
I PCI Express Port 15 Serial Data Receive. Differential PCI Express receive pair for
port 15.
PE15TP[0]
PE15TN[0]
O PCI Express Port 15 Serial Data Transmit. Differential PCI Express transmit pair for
port 15.
REFCLKM I PCI Express Reference Clock Mode Select. This signal selects the frequency of the
reference clock input.
0x0 - 100 MHz
0x1 - 125 MHz
PEREFCLKP[3:0]
PEREFCLKN[3:0]
I PCI Express Reference Clock. Differential reference clock pair input. This clock is
used as the reference clock by on-chip PLLs to generate the clocks required for the
system logic and on-chip SerDes. The frequency of the differential reference clock is
determined by the REFCLKM signal.
Signal Type Name/Description
MSMBADDR[4:1] I Master SMBus Address. These pins determine the SMBus address of the serial
EEPROM from which configuration information is loaded.
MSMBCLK I/O Master SMBus Clock. This bidirectional signal is used to synchronize transfers on the
master SMBus. It is active and generating the clock only when the EEPROM or I/O
Expanders are being accessed.
MSMBDAT I/O Master SMBus Data. This bidirectional signal is used for data on the master SMBus.
SSMBADDR[5,3:1] I Slave SMBus Address. These pins determine the SMBus address to which the slave
SMBus interface responds.
SSMBCLK I/O Slave SMBus Clock. This bidirectional signal is used to synchronize transfers on the
slave SMBus.
SSMBDAT I/O Slave SMBus Data. This bidirectional signal is used for data on the slave SMBus.
Table 3 SMBus Interface Pins
Signal Type Name/Description
GPIO[0] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
GPIO[1] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
GPIO[2] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
GPIO[3] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Table 4 General Purpose I/O Pins (Part 1 of 4)
Signal Type Name/Description
Table 2 PCI Express Interface Pins (Part 3 of 3)
6 of 36 October 3, 2011
IDT 89HPES16H16 Data Sheet
GPIO[4] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
GPIO[5] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: GPEN
Alternate function pin type: Output
Alternate function: General Purpose Event (GPE) output
GPIO[6] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P1RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 1
GPIO[7] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P2RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 2
GPIO[8] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P3RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 3
GPIO[9] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P4RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 4
GPIO[10] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P5RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 5
GPIO[11] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P6RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 6
GPIO[12] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P7RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 7
GPIO[13] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P8RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 8
Signal Type Name/Description
Table 4 General Purpose I/O Pins (Part 2 of 4)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

89HPES16H16ZABL

Mfr. #:
Buy 89HPES16H16ZABL
Manufacturer:
IDT
Description:
PCI Interface IC PCIE 16-LANE 16 PORT SWITCH
Lifecycle:
New from this manufacturer.
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