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8516FYILFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
Low Skew, 1-to-16 Differential-to-
LVDS, Clock Distribution Chip
ICS8516I
ICS8516I REVISION B SEPTEMBER 10, 2009 1 ©2009 Integrated Device Technology, Inc.
DATA SHEET
GENERAL DESCRIPTION
The ICS8516I is a low skew, high performance 1-
to-16 Differential-to-LVDS Clock Distribution Chip
and a member of the HiPerClockS™ family of High
Performance Clock Solutions from IDT. The
ICS8516I CLK, nCLK pair can accept any differ-
ential input levels and translates them to 3.3V LVDS output
levels. Utilizing Low Voltage Differential Signaling (LVDS), the
ICS8516I provides a low power, low noise, point-to-point solu-
tion for distributing clock signals over controlled impedances
of 100Ω.
Dual output enable inputs allow the ICS8516I to be used in a
1-to-16 or 1-to-8 input/output mode. Guaranteed output and
part-to-part skew specifications make the ICS8516I ideal for
those applications demanding well defined performance and
repeatability.
BLOCK DIAGRAM PIN ASSIGNMENT
FEATURES
• Sixteen Differential LVDS outputs
• CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
• Maximum output frequency: 700MHz
• Translates any differential input signal (LVPECL, LVHSTL,
SSTL, DCM) to LVDS levels without external bias networks
• Translates any single-ended input signal to LVDS
with resistor bias on nCLK input
• Multiple output enable inputs for disabling unused
outputs in reduced fanout applications
• LVDS compatible
• Output skew: 65ps (maximum)
• Part-to-part skew: 550ps (maximum)
• Propagation delay: 2.4ns (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS™
ICS
48-Lead LQFP
7mm x 7mm x 1.4mm body package
Y Package
Top View
OE1
OE2
CLK
nCLK
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Q15
nQ15
Q14
nQ14
Q13
nQ13
Q12
nQ12
Q11
nQ11
Q10
nQ10
Q9
nQ9
Q8
nQ8
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
VDD
nQ5
Q5
nQ4
Q4
V
DD
GND
nQ3
Q3
nQ2
Q2
V
DD
VDD
nQ10
Q10
nQ11
Q11
V
DD
GND
nQ12
Q12
nQ13
Q13
V
DD
nQ14
Q14
nQ15
Q15
GND
CLK
nCLK
GND
Q0
nQ0
Q1
nQ1
ICS8516I
Q9
nQ9
Q8
nQ8
GND
OE2
OE1
GND
nQ7
Q7
nQ6
Q6
ICS8516I REVISION B SEPTEMBER 10, 2009 2 ©2009 Integrated Device Technology, Inc.
ICS8516I Data Sheet LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
TABLE 1. PIN DESCRIPTIONS
rebmuNemaNepyTnoitpircseD
,21,6,1
63,13,52
V
DD
rewoP.snipylppusevitisoP
3,25Q,5QntuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
5,44Q,4QntuptuO.slevelecaf
retniSDVL.riaptuptuolaitnereffiD
,02,71,7
44,14,03
DNGrewoP.dnuorgylppusrewoP
9,83Q,3QntuptuO.slevelecafretniS
DVL.riaptuptuolaitnereffiD
11,012Q,2QntuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
41,311Q,1QntuptuO.sle
velecafretniSDVL.riaptuptuolaitnereffiD
61,510Q,0QntuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
81KLCnt
upnIpulluP.tupnikcolclaitnereffidgnitrevnI
91KLCtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
22,1251Qn,51
QtuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
42,3241Qn,41QtuptuO.slevelecafretniSDVL.riaptuptuolaitne
reffiD
72,6231Qn,31QtuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
92,8221Qn,21QtuptuO.slevelecafretniSDVL
.riaptuptuolaitnereffiD
33,2311Qn,11QtuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
53,4301Qn,01QtuptuO.sl
evelecafretniSDVL.riaptuptuolaitnereffiD
83,739Qn,9QtuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
04,9
38Qn,8QtuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
34,241EO,2EOtupnIpulluP
;51Qn,51Qurht8Qn,8Qstuptuosl
ortnoc2EO.elbanetuptuO
.7Qn,7Qurht0Qn,0Qstuptuoslortnoc1EO
.slevelecafretniLTTVL/SOMCVL
64,547Q,7QntuptuO.s
levelecafretniSDVL.riaptuptuolaitnereffiD
84,746Q,6QntuptuO.slevelecafretniSDVL.riaptuptuolaitnereffiD
:ET
ON
pulluP
dna
nwodlluP
.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer
ICS8516I REVISION B SEPTEMBER 10, 2009 3 ©2009 Integrated Device Technology, Inc.
ICS8516I Data Sheet LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
TABLE 2. PIN CHARACTERISTICS
TABLE 3A. CONTROL INPUT FUNCTION TABLE
TABLE 3B. CLOCK INPUT FUNCTION TABLE
stupnIstuptuO
1EO2EO7Q:0Q7Qn:0Qn51Q:8Q51Qn:8Qn
00 ZiHZiHZiHZiH
10 EVITCAEVITCAZiHZiH
01 ZiHZiHEVITCAEVITCA
11 EVITCAEVITCAEVITCAEVITCA
.B
3elbaTnidebircsedsastupniKLCndnaKLCehtfonoitcnufaerastuptuoehtfoetatseht,edomevitcaehtnI
stupnIstuptuO
edoMtuptuOottupnIytiraloP
KLCKLCn51Q:0Q51Qn:0Qn
01WOLHGIHlaitnereffiDotlaitnereffiDgnitrevnInoN
10 HGIHWO
LlaitnereffiDotlaitnereffiDgnitrevnInoN
01ETON;desaiBWOLHGIHlaitnereffiDotdednEelgniSgnitrevnInoN
11ETON;desaiBH
GIHWOLlaitnereffiDotdednEelgniSgnitrevnInoN
1ETON;desaiB0HGIHWOLlaitnereffiDotdednEelgniSgnitrevnI
1ETON;desaiB1W
OLHGIHlaitnereffiDotdednEelgniSgnitrevnI
."sleveLdednEelgniStpeccAottupnIlaitnereffiDehtgniriW",noitcesno
itamrofnInoitacilppAehtotreferesaelP:1ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
R
PULLUP
rotsiseRpulluPtupnI 15KΩ
R
NWODLLUP
rotsiseRnwodlluPtupnI 15KΩ
C
DP
ecnaticapaCnoitapissiDrewoP
)tuptuorep(
4Fp
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

8516FYILFT

Mfr. #:
Buy 8516FYILFT
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 16 LVDS OUT BUFFER
Lifecycle:
New from this manufacturer.
Delivery:
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