APDS-9306 Datasheet APDS-9306, APDS-9306-065 | P10-P12

The APDS-9306/APDS-9306-065 is controlled and monitored by data registers and a command register accessed through

the serial interface. These registers provide for a variety of control functions and can be read to determine results of the

ADC conversions.

Address Type Name Description Reset Value

00HEX RW MAIN_CTRL ALS operation mode control, SW reset 00HEX

04HEX RW ALS_MEAS_RATE ALS measurement rate and resolution in Active mode 22HEX

05HEX RW ALS_GAIN ALS analog gain range 01HEX

06HEX R Part_ID Part number ID and revision ID B1HEX (APDS-9306)

B3HEX (APDS-9306-065)

07HEX R MAIN_STATUS Power-on status, interrupt status, data status 20HEX

0AHEX R CLEAR_DATA_0 Clear ADC measurement data - LSB 00HEX

0BHEX R CLEAR_DATA_1 Clear ADC measurement data 00HEX

0CHEX R CLEAR_DATA_2 Clear ADC measurement data - MSB 00HEX

0DHEX R ALS_DATA_0 ALS ADC measurement data - LSB 00HEX

0EHEX R ALS_DATA_1 ALS ADC measurement data 00HEX

0FHEX R ALS_DATA_2 ALS ADC measurement data - MSB 00HEX

19HEX RW INT_CFG Interrupt con guration 10HEX

1AHEX RW INT_PERSISTENCE Interrupt persist setting 00HEX

21HEX RW ALS_THRES_UP_0 ALS interrupt upper threshold, LSB FFHEX

22HEX RW ALS_THRES_UP_1 ALS interrupt upper threshold FFHEX

23HEX RW ALS_THRES_UP_2 ALS interrupt upper threshold, MSB 0FHEX

24HEX RW ALS_THRES_LOW_0 ALS interrupt lower threshold, LSB 00HEX

25HEX RW ALS_THRES_LOW_1 ALS interrupt lower threshold 00HEX

26HEX RW ALS_THRES_LOW_2 ALS interrupt lower threshold, MSB 00HEX

27HEX RW ALS_THRES_VAR ALS interrupt variance threshold 00HEX

MAIN_CTRL

Default Value: 00HEX

76543210

0 0 0 SW_Reset 0 0 ALS_EN 0 0X00

FIELD BIT DESCRIPTION

SW_Reset 4 1 = Reset will be triggered

ALS_EN 1 1 = ALS active

0 = ALS standby

Writing to this register stops the ongoing measurements and starts new measurements (depends on the respective enable bit).

ALS_MEAS_RATE

Default value: 22HEX

76543210

0 ALS Resolution/Bit Width 0 ALS Measurement Rate 0X04

FIELD BIT DESCRIPTION

ALS

Resolution/

Bit Width

6:4 000 : 20 bit – 400ms

001 : 19 bit – 200ms

010 : 18 bit – 100ms (default)

011 : 17 bit – 50ms

100 : 16 bit – 25ms

101 : 13 bit – 3.125ms

110 : Reserved

111 : Reserved

ALS

Measurement

Rate

2:0 000 – 25ms

001 – 50ms

010 – 100ms (default)

011 – 200ms

100 – 500ms

101 – 1000ms

110 – 2000ms

111 – 2000ms

When the measurement repeat rate is programmed to be faster than possible for the speci ed ADC measurement time,

the repeat rate will be lower than programmed (maximum speed).

Writing to this register stops the ongoing measurements and starts new measurements (depends on the respective

enable bit).

ALS_GAIN

Default Value: 01HEX

76543210

0 0 0 0 0 ALS Gain Range 0X05

FIELD BIT DESCRIPTION

ALS Gain Range 2:0 000 : Gain 1

001 : Gain 3

010 : Gain 6

011 : Gain 9

100 : Gain 18

Writing to this register stops the ongoing measurement and starts new measurements (depending on the respective

bits).

PART_ID

Default Value: B1HEX (APDS-9306), B3HEX (APDS-9306-065)

76543210

Part ID Revision ID 0X06

FIELD BIT DESCRIPTION

Part Number ID 7:4 Part number ID

Revision ID 3:0 Revision ID of the component

MAIN_STATUS

Default Value: 20HEX

76543210

00Power

Status

ALS

Interrupt

Status

ALS

Data

Status

0 0 0 0X07

FIELD BIT DESCRIPTION

Power On

Status

5 1 = Part went through a power-up event, either because the part was turned on or

because there was power supply disturbance. All interrupt threshold settings in the

registers have been reset to power-on default states and should be examined if neces-

sary. The  ag is cleared after the register is read.

ALS Interrupt

Status

4 0 : Interrupt condition not ful lled (default)

1 : Interrupt condition ful lled (cleared after read)

ALS Data

Status

3 0 : old data, already read (default)

1 : new data, not yet read (cleared after read)

CLEAR_DATA

Default Value: 00HEX, 00HEX, 00HEX

76543210

CLEAR _DATA_0 [7:0] 0X0A

CLEAR_DATA_1 [15:8] 0X0B

0 0 0 0 CLEAR_DATA_2 [19:16] 0X0C

Clear channel digital output data (unsigned integer, 13 to 20 bit, LSB aligned). The clear channel data is clipped at (2

Reso-

lution

– 1)

The clear channel output is already temperature compensated internally:

CLEAR_DATA = (CLEAR

int

- COMP)

When an I²C™ read operation is active and points to an address in the range 07HEX to 18HEX, all registers in this range

are locked until the I²C™ read operation is completed or this address range is left.

This guarantees that the data in the registers comes from the same measurement even if an additional measurement

cycle ends during the read operation. New measurement data is stored into temporary registers and the actual CLEAR_

DATA registers are updated as soon as there is no on-going I²C™ read operation to the address range 07HEX to 18HEX.

Reg 0AHEX Bit[7:0] Clear diode data least signi cant data byte

Reg 0BHEX Bit[7:0] Clear diode data intervening data byte

Reg 0CHEX Bit[3:0] Clear diode data most signi cant data byte

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21

APDS-9306

Mfr. #:

Buy APDS-9306

Manufacturer:

Broadcom / Avago

Description:

Ambient Light Sensors Digital Ambient Light Sensor

Lifecycle:

New from this manufacturer.

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APDS-9306

APDS-9306

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