4
ALS Characteristics, V
DD
= 2.8 V, T
A
= 25°C (unless otherwise noted)
Parameter Symbol Min. Typ. Max. Units Test Conditions
Peak Wavelength
P
560 nm
Output Resolution 13 18 20 bit Programmable
Dark ALS ADC Count Value 0 3 counts G=18x, 50ms
ALS ADC Count Value 1600 2000 2400 counts G=3x, 100msec, =530nm,
Ee=49.8W/cm
2 [1]
Ee=43 W/cm
2 [2]
ALS ADC Integration Time 25 400 ms With 50/60Hz rejection
Gain Scaling,
Relative to 1x Gain Setting
3
6
9
18
AGAIN = 3x
AGAIN = 6x
AGAIN = 9x
AGAIN = 18x
Notes
1. Applies to APDS-9306
2. Applies to APDS-9306-065
Characteristics of the SDA and SCL bus lines, V
DD
= 2.8 V, T
A
= 25°C (unless otherwise noted) †
Parameter Symbol Min. Max. Unit
SCL Clock Frequency f
SCL
0 400 kHz
Hold Time (repeated) START condition.
After this Period, the First Clock Pulse is Generated
t
HD;STA
0.6 – s
LOW Period of the SCL Clock t
LOW
1.3 – s
HIGH Period of the SCL Clock t
HIGH
0.6 – s
Set-Up Time for a Repeated START Condition t
SU;STA
0.6 – s
Data Hold Time t
HD;DAT
0 0.9 s
Data Set-Up Time t
SU;DAT
100 – ns
Clock/Data Fall Time t
f
0 300 ns
Clock/Data Rise Time t
r
0 300 ns
Set-Up Time for STOP Condition t
SU;STO
0.6 – s
Bus Free Time between a STOP and START Condition t
BUF
1.3 - s
