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NB3N121KMNG

P1-P3P4-P6P7-P9P10-P11
NB3N121K
http://onsemi.com
4
Table 2. ATTRIBUTES
Characteristic Value
ESD Protection Human Body Model
Machine Model
>2 kV
200 V
Moisture Sensitivity (Note 2) QFN−52 Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 409
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
2. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS (Note 3)
Symbol
Parameter Condition 1 Condition 2 Rating Unit
V
CC
Positive Power Supply GND = 0 V 4.6 V
V
I
Positive Input GND = 0 V GND − 0.3 ≤ V
I
≤ V
CC
V
I
OUT
Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range QFN−52 −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) (Note 3) 0 lfpm
500 lfpm
QFN−52
QFN−52
25
19.6
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) 2S2P (Note 4) QFN−52 21 °C/W
T
sol
Wave Solder Pb−Free 265 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. JEDEC standard 51−6, multilayer board − 2S2P (2 signal, 2 power).
4. JEDEC standard multilayer board − 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad.
NB3N121K
http://onsemi.com
5
Table 4. DC CHARACTERISTICS (V
CC
= 3.0 V to 3.6 V, T
A
= −40°C to +85°C Note 5)
Symbol
Characteristic Min Typ Max Unit
I
GND
GND Supply Current (All Outputs Loaded) 120 150 mA
I
CC
Power Supply Current (All Outputs Loaded) 440 500 mA
I
IH
Input HIGH Current 2.0 150
mA
I
IL
Input LOW Current −150 −2.0
mA
R
TIN
Internal Input Termination Resistor 45 50 55
W
DIFFERENTIAL INPUT DRIVEN SINGLE*ENDED (See Figures 4 and 5)
V
th
Input Threshold Reference Voltage Range (Note 6) 350 V
CC
− 1000 mV
V
IH
Single−Ended Input HIGH Voltage V
th
+ 150 V
CC
mV
V
IL
Single−Ended Input LOW Voltage GND V
th
− 150 mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 7, 8 and 9)
V
IHD
Differential Input HIGH Voltage 425 V
CC
− 850 mV
V
ILD
Differential Input LOW Voltage GND V
CC
− 1000 mV
V
ID
Differential Input Voltage (V
IHD
− V
ILD
) 150 V
CC
− 850 mV
V
CMR
Input Common Mode Range 350 V
CC
− 1000 mV
HCSL OUTPUTS (Figure 4)
V
OH
Output HIGH Voltage 600 740 900 mV
V
OL
Output LOW Voltage −150 0 150 mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Measurements taken with with outputs loaded 50 W to GND. Connect a 475 W resister from IREF (Pin 1) to GND. See Figure 6.
6. V
th
is applied to the complementary input when operating in single ended mode per Figure 4.
NB3N121K
http://onsemi.com
6
Table 5. AC CHARACTERISTICS V
CC
= 3.0 V to 3.6 V, GND = 0 V; −40°C to +85°C (Note 7)
Symbol
Characteristic Min Typ Max Unit
V
OUTPP
Output Voltage Amplitude (@ V
INPPmin
) f
in
≤ 400 MHz 725 1000 mV
t
PLH
,
t
PHL
Propagation Delay (See Figure 3a) CLK/CLK to Qx/Qx 550 800 950 ps
Dt
PLH
,
Dt
PHL
Propagation Delay Variations Per Each Diff Pair
(Note 8) (See Figure 3a) CLK/CLK
to Qx/Qx 100
ps
t
SKEW
Duty Cycle Skew (Note 9)
Within -Device Skew
Device to Device Skew (Note 10)
20
100
150
ps
t
JIT
Additive RMS Phase Jitter (Note 11) F
in
= 100 MHz 0.1 ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration)
150 V
CC
−
850
mV
V
CROSS
Absolute Crossing Magnitude Voltage (See Figure 3c) 250 550 mV
DV
CROSS
Variation in Magnitude of V
CROSS
(See Figure 3c) 150 mV
t
r
, t
f
Absolute Magnitude in Output Risetime and Falltime (from 175 mV to 525 mV)
(See Figure 3b) Qx, Qx
100 340 700
ps
Dtr, D tf
Variation in Magnitude of Risetime and Falltime (Single−Ended) (See Figure 3b) Qx, Qx 125 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Measured by forcing V
INPP
(MIN) from a 50% duty cycle clock source. Connect a 475 W resister from IREF (Pin 1) to GND. All outputs loaded
50 W to GND per Figure 6.
8. Measured from the input pair crosspoint to each single output pair crosspoint across temp and voltage ranges per Figure 3.
9. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw- and Tpw+.
10.Skew is measured between outputs under identical conditions @ 50 MHz.
11. Phase noise integrated from 12 kHz to 20 MHz
P1-P3P4-P6P7-P9P10-P11

NB3N121KMNG

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Buy NB3N121KMNG
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 3.3V 1:21 DIFF FANOUT CLO
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