TDA9885_TDA9886_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 16 December 2008 25 of 56
NXP Semiconductors
TDA9885; TDA9886
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
I standard; see Figure 19
B
v(3dB)(trap)
3 dB video bandwidth including
sound carrier trap
f
trap
= 6.0 MHz
[11]
5.40 5.50 - MHz
α
SC1
attenuation at first sound carrier f = 6.0 MHz 26 32 - dB
α
SC1(60kHz)
attenuation at first sound carrier
f
SC1
± 60 kHz
f = 6.0 MHz 20 26 - dB
α
SC2
attenuation at second sound
carrier
f = 6.55 MHz 12 18 - dB
α
SC2(60kHz)
attenuation at second sound
carrier f
SC2
± 60 kHz
f = 6.55 MHz 10 15 - dB
t
d(g)(cc)
group delay at color carrier
frequency
f = 4.43 MHz - 90 160 ns
D/K standard; see
Figure 20
B
v(3dB)(trap)
3 dB video bandwidth including
sound carrier trap
f
trap
= 6.5 MHz
[11]
5.50 5.95 - MHz
α
SC1
attenuation at first sound carrier f = 6.5 MHz 26 32 - dB
α
SC1(60kHz)
attenuation at first sound carrier
f
SC1
± 60 kHz
f = 6.5 MHz 20 26 - dB
α
SC2
attenuation at second sound
carrier
f = 6.742 MHz 18 24 - dB
α
SC2(60kHz)
attenuation at second sound
carrier f
SC2
± 60 kHz
f = 6.742 MHz 13 18 - dB
t
d(g)(cc)
group delay at color carrier
frequency
f = 4.28 MHz - 60 130 ns
Video output 1.1 V; pin CVBS
Trap bypass mode and sound carrier off
[12]
V
o(v)(p-p)
video output voltage
(peak-to-peak value)
see Figure 7 0.95 1.10 1.25 V
V
sync
sync voltage level 1.35 1.5 1.6 V
V
clip(u)
upper video clipping voltage level 3.5 3.6 - V
V
clip(l)
lower video clipping voltage level - 0.9 1.0 V
B
v(1dB)
1 dB video bandwidth AC load: C
L
<20pF,
R
L
>1k
56- MHz
B
v(3dB)
3 dB video bandwidth AC load: C
L
<20pF,
R
L
>1k
78- MHz
S/N
W
weighted signal-to-noise ratio unified weighting filter
(
“ITU-T J.61”
);
see
Figure 13
[7]
56 59 - dB
S/N
UW
unweighted signal-to-noise ratio
[7]
48 52 - dB
Table 20. Characteristics
…continued
V
P
=5V; T
amb
=25
°
C; see Table 22 for input frequencies; B/G standard is used for the specification (f
PC
= 38.9 MHz;
f
SC
= 33.4 MHz; PC / SC = 13 dB; f
mod
= 400 Hz); input level V
i(VIF)
= 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50
via broadband transformer 1 : 1; video modulation DSB; residual carrier for B/G is 10 % and for
L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”; measurements taken in
test circuit of
Figure 26; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TDA9885_TDA9886_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 16 December 2008 26 of 56
NXP Semiconductors
TDA9885; TDA9886
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
VIF AGC
[13]
t
resp(inc)
AGC response time to an
increasing VIF step
negative modulation; 20 dB
[14]
-4-ms
positive modulation; 20 dB
[14]
- 2.6 - ms
t
resp(dec)
AGC response time to a
decreasing VIF step
negative modulation; 20 dB
[14]
-3-ms
positive modulation; 20 dB
[14]
- 890 - ms
L standard; fast mode - 2.6 - ms/dB
L standard; normal mode
[14]
- 143 - ms/dB
V
i(VIF)
VIF amplitude step for activating
AGC fast mode
L standard 2 6 10 dB
V
VAGC
gain control voltage range see Figure 9 0.8 - 3.5 V
CR
stps
control steepness definition: G
VIF
/ V
VAGC
;
V
VAGC
=2Vto3V
- 80 - dB/V
V
th(VIF)
threshold voltage for high level
VIF input
see Table 6 and Table 7 120 200 320 µV
Pin VAGC
I
ch(max)
maximum charge current L standard - 100 - µA
I
ch(add)
additional charge current L standard: in the event of
missing VITS pulses and
no white video content
- 100 - nA
I
dch
discharge current L standard; normal mode - 35 - nA
L standard; fast mode - 1.8 - µA
Tuner AGC; pin TAGC; see
Figure 9 to Figure 11
V
i(VIF)(start1)(rms)
VIF input signal voltage for
minimum starting point of tuner
takeover at pins VIF1 and VIF2
(RMS value)
I
TAG C
= 120 µA;
R
TOP
=22k or no R
TOP
and 15 dB via I
2
C-bus
(see
Table 12)
- 25mV
V
i(VIF)(start2)(rms)
VIF input signal voltage for
maximum starting point of tuner
takeover at pins VIF1 and VIF2
(RMS value)
I
TAG C
= 120 µA;R
TOP
=0
or no R
TOP
and +15 dB via
I
2
C-bus (see Table 12)
45 90 - mV
QV
TOP
tuner takeover point accuracy I
TAG C
= 120 µA;
R
TOP
=10k or no R
TOP
and 0 dB via I
2
C-bus
(see
Table 12)
7 1743mV
QV
TOP
/T takeover point variation with
temperature
I
TAG C
= 120 µA - 0.03 0.07 dB/K
V
o
permissible output voltage from external source - - 8.8 V
V
sat
saturation voltage I
TAG C
= 450 µA - - 0.5 V
I
sink
sink current no tuner gain reduction;
V
TAG C
= 8.8 V
- - 0.75 µA
maximum tuner gain
reduction; V
TAG C
=1V
450 600 750 µA
Table 20. Characteristics
…continued
V
P
=5V; T
amb
=25
°
C; see Table 22 for input frequencies; B/G standard is used for the specification (f
PC
= 38.9 MHz;
f
SC
= 33.4 MHz; PC / SC = 13 dB; f
mod
= 400 Hz); input level V
i(VIF)
= 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50
via broadband transformer 1 : 1; video modulation DSB; residual carrier for B/G is 10 % and for
L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”; measurements taken in
test circuit of
Figure 26; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TDA9885_TDA9886_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 16 December 2008 27 of 56
NXP Semiconductors
TDA9885; TDA9886
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
G
IF
IF slip by automatic gain control tuner gain current from
20%to80%
358dB
AFC circuit; pin AFC
[15][16]
; see Figure 12
V
sat(ul)
upper limit saturation voltage V
P
0.6 V
P
0.3 - V
V
sat(ll)
lower limit saturation voltage - 0.3 0.6 V
I
source(o)
output source current 160 200 240 µA
I
sink(o)
output sink current 160 200 240 µA
AFC
stps
AFC control steepness definition: I
AFC
/ f
VIF
0.85 1.05 1.25 µA/kHz
Qf
VIF(a)
analog accuracy of AFC circuit I
AFC
=0µA; f
REF
= 4 MHz 20 - +20 kHz
Qf
VIF(d)
digital accuracy of AFC circuit via
I
2
C-bus
I
AFC
=0µA; f
REF
= 4 MHz;
1 digit = 25 kHz
20
1 digit
- +20
+ 1 digit
kHz
SIF amplifier; pins SIF1 and SIF2
V
i(SIF)(rms)
SIF input voltage sensitivity
(RMS value)
FM mode; 3 dB at
intercarrier output
pin SIOMAD
-3070µV
AM mode; 3 dB at
AF output pin AUD
- 70 100 µV
V
i(max)(rms)
maximum input voltage
(RMS value)
FM mode; +1 dB at
intercarrier output
pin SIOMAD
50 70 - mV
AM mode; +1 dB at
AF output pin AUD
80 140 - mV
V
i(ovl)(rms)
overload input voltage
(RMS value)
[2]
- - 320 mV
G
SIF(cr)
SIF gain control range FM and AM mode;
see
Figure 11
60 66 - dB
B
SIF(3dB)(ll)
lower limit 3 dB SIF bandwidth - 15 - MHz
B
SIF(3dB)(ul)
upper limit 3 dB SIF bandwidth - 80 - MHz
R
i(dif)
differential input resistance
[3]
-2-k
C
i(dif)
differential input capacitance
[3]
-3-pF
V
I
DC input voltage - 1.93 - V
SIF-AGC detector
t
resp
AGC response time to an
increasing or decreasing SIF step
of 20 dB
FM or AM fast step
increasing - 8 - ms
decreasing - 25 - ms
AM slow step
increasing - 80 - ms
decreasing - 250 - ms
Table 20. Characteristics
…continued
V
P
=5V; T
amb
=25
°
C; see Table 22 for input frequencies; B/G standard is used for the specification (f
PC
= 38.9 MHz;
f
SC
= 33.4 MHz; PC / SC = 13 dB; f
mod
= 400 Hz); input level V
i(VIF)
= 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50
via broadband transformer 1 : 1; video modulation DSB; residual carrier for B/G is 10 % and for
L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”; measurements taken in
test circuit of
Figure 26; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit

TDA9885HN/V5,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC IF-PLL DEMOD I2C-BUS 32-HVQFN
Lifecycle:
New from this manufacturer.
Delivery:
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