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AD8011ARZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
REV. C
AD8011
–9–
THEORY OF OPERATION
The AD8011 is a revolutionary generic high speed CF amplifier
that attains new levels of BW, power, distortion, and signal swing
capability. If these key parameters were combined as a figure of
ac merit performance or [(frequency ⫻ V
SIG
)/(distortion ⫻ power)],
no IC amplifier today would come close to the merit value of the
AD8011 for frequencies above a few MHz. Its wide dynamic
performance (including noise) is the result of both a new com-
plementary high speed bipolar process and a new and unique
architectural design. The AD8011 uses basically a two gain stage
complementary design approach versus the traditional “single
stage” complementary mirror structure sometimes referred to as
the Nelson amplifier. Though twin stages have been tried before,
they typically consumed high power since they were of a folded
cascade design much like the AD9617. This design allows for
the standing or quiescent current to add to the high signal or slew
current induced stages much like the Nelson or single-stage design.
Thus, in the time domain, the large signal output rise/fall time
and slew rate is controlled typically by the small signal BW of the
amplifier and the input signal step amplitude respectively, not the
dc quiescent current of the gain stages (with the exception of
input level shift diodes Q1/Q2). Using two stages versus one also
allows for a higher overall gain bandwidth product (GBWP) for
the same power, thus lower signal distortion and the ability to
drive heavier external loads. In addition, the second gain stage
also isolates (divides down) A3’s input reflected load drive and
the nonlinearities created resulting in relatively lower distortion
and higher open-loop gain.
Overall, when high external load drive and low ac distortion is a
requirement, a twin gain stage integrating amplifier like the AD8011
will provide superior results for lower power over the traditional
single-stage complementary devices. In addition, being a CF
amplifier, closed-loop BW variations versus external gain variations
(varying RN) will be much lower compared to a VF op amp, where
the BW varies inversely with gain. Another key attribute of this
amplifier is its ability to run on a single 5 V supply due in part to
its wide common-mode input and output voltage range capability.
For 5 V supply operation, the device obviously consumes half
the quiescent power (versus 10 V supply) with little degradation
in its ac and dc performance characteristics. See Specifications.
DC GAIN CHARACTERISTICS
Gain stages A1/A1B and A2/A2B combined provide negative
feedforward transresistance gain (see Figure 6). Stage A3 is a unity
gain buffer that provides external load isolation to A2. Each stage
uses a symmetrical complementary design. (A3 is also complemen-
tary though not explicitly shown.) This is done to reduce second
order signal distortion and overall quiescent power as discussed
previously. In the quasi dc to low frequency region, the closed-
loop gain relationship can be approximated as
G = 1 + R
F
/R
N
noninverting operation
G = –R
F
/R
N
inverting operation
These basic relationships are common to all traditional opera-
tional amplifiers. Due to the inverting input error current (I
E
)
required to servo the output and the inverting I
E
⫻ R
I
drop
V
P
Q1
Q2
IPP
IPN
IPN
V
N
Z
I
IQ1
Q3
Q4
IE
IR – IFC
IR + IFC
C
P
1
C
P
1
Z2
A2
C
L
R
L
ICQ – IO
R
F
V
O
C
D
ICQ + IO
–V
I
–V
I
V
O
IQ1
AD8011
A2
C
P
2
Z1
Z1 = R1 || C1
Z1
C
D
R
L
A1
A1
INP
A3
Figure 6. Simplified Block Diagram
REV. C–10–
AD8011
(error current times the open-loop inverting input resistance) that
results (see Figure 7), a more exact low frequency closed-loop
transfer function can be described as
A
G
GR
T
R
T
G
G
A
R
T
V
I
O
F
OO
F
O
=
+
×
+
=
++11
for noninverting (G is positive).
A
V
O
F
O
G
G
A
R
T
=
++1
1 –
for inverting (G is negative).
where G is the ideal gain as previously described. With R
I
= T
O
/A
O
(open-loop inverting input resistance), the second expression
(positive G) clearly relates to the classical voltage feedback op amp
equation with T
O
omitted due to its relatively much higher value
and thus insignificant effect. A
O
and T
O
are the open-loop dc
voltage and transresistance gains of the amplifier, respectively.
These key transfer variables can be described as
A
Rg
mf
A
g
mc
R
O
=
××
×
12
1
1
|
|
( – )
and
T
RA
O
=
×
12
2
|
|
Therefore
R
g
mc
R
g
mf
I
=
×
×
1
1
2
–
where g
mc
is the positive feedback transconductance (not shown)
and 1/g
mf
is the thermal emitter resistance of devices D1/D2 and
Q3/Q4. The g
mc
× R1 product has a design value that results in a
negative dc open-loop gain of typically –2500 V/V (see Figure 8).
R
S
L
N
T
O
(s)
A
O
(s)
V
P
Z
I
IE
L
I
R
N
C
P
R
F
+V
S
–V
S
L
S
R
L
C
L
V
O
L
S
Z
I
= OPEN LOOP INPUT IMPEDANCE = C
I
|| R
L
Figure 7. Z
I
= Open-Loop Input Impedance
Though atypical of conventional CF or VF amps, this negative
open-loop voltage gain results in an input referred error term
(V
P
–V
O
/G = G/A
O
+ R
F
/T
O
) that will typically be negative for G,
greater than +3/–4. As an example, for G = 10, A
O
= –2500,
and T
O
= 1.2 MΩ, results in an error of –3 mV using the A
V
derivation above.
This analysis assumes perfect current sources and infinite transistor
V
A
s. (Q3, Q4 output conductances are assumed zero.) These
assumptions result in actual versus model open-loop voltage gain
and associated input referred error terms being less accurate for
low gain (G) noninverting operation at the frequencies below the
open-loop pole of the AD8011. This is primarily a result of the
input signal (V
P
) modulating the output conductances of Q3/Q4,
resulting in R
I
less negative than derived here. For inverting
operation, the actual versus model dc error terms are relatively
much less.
1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 1E+09
80
70
60
50
40
20
10
FREQUENCY (Hz)
30
GAIN (dB ⍀)
–90
PHASE (Degrees)
–100
–110
–120
–160
PHASE
GAIN
0
–10
–20
–30
–170
–180
–190
–200
–130
–140
–150
A
O
(s)
Figure 8. Open-Loop Voltage Gain and Phase
AC TRANSFER CHARACTERISTICS
The ac small signal transfer derivations below are based on a
simplified single-pole model. Though inaccurate at frequencies
approaching the closed-loop BW (CLBW) of the AD8011 at low
noninverting external gains, they still provide a fair approxima-
tion and an intuitive understanding of its primary ac small signal
characteristics.
For inverting operation and high noninverting gains, these
transfer equations provide a good approximation to the actual
ac performance of the device.
To accurately quantify the V
O
versus V
P
relationship, A
O
(s)
and T
O
(s) need to be derived. This can be seen by the following
nonexpanded noninverting gain relationship
VsVs
G
G
As
R
Ts
OP
O
F
O
()/ ()
[] []
=
++1
with
As
Rg
mf
A
g
mc
R
S
g
mc
R
O
()
||
–
–
=
××
×
×
12
11
1
11
τ
where R1 is the input resistance to A2/A2B, and τ1 (equal to
CD ⫻ R1 ⫻ A2) is the open-loop dominate time constant,
and
T
s
AR
s
O
()
||
=
×
+
21
2
11τ
REV. C
AD8011
–11–
1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 1E+09
FREQUENCY (Hz)
140
120
100
80
60
20
0
40
GAIN (dB ⍀)
0
PHASE (Degrees)
–40
–80
–120
–160
–200
–240
–280
PHASE
GAIN
T
O
(s)
Figure 9. Open-Loop Transimpedance Gain
Note that the ac open-loop plots in Figures 8, 9, and 10 are based
on the full SPICE AD8011 simulations and do not include
external parasitics (see equations below). Nevertheless, these ac
loop equations still provide a good approximation to simulated
and actual performance up to the CLBW of the amplifier. Typi-
cally, g
mc
⫻ R1 is –4, resulting in A
O
(s) having a right half plane
pole. In the time domain (inverse Laplace of A
O
), it appears as
unstable, causing V
O
to exponentially rail out of its linear region.
When the loop is closed however, the BW is greatly extended and
the transimpedance gain, T
O
(s), overrides and directly controls
the amplifiers stability behavior due to Z
I
approaching 1/2 g
mf
for s>>1/τ1 (see Figure 10). This can be seen by the Z
I
(s) and
A
V
(s) noninverting transfer equations below.
Zs
g
mc
R
S
g
mc
R
g
mf
S
I
()
( – )
–
()
=
×
×
+
×+
11
1
11
1
211
τ
τ
As
G
G
A
R
T
S
G
g
mf
T
R
T
V
O
F
OO
F
O
()=
++
+
+
11
2
1
τ
1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 1E+09
400
370
340
310
280
220
190
FREQUENCY (Hz)
250
RESISTANCE (⍀)
20
PHASE (Degrees)
0
–20
–40
–120
160
130
100
–140
–160
–180
–60
–80
–100
SERIES 1
IMPEDANCE
Z
I
(s)
SERIES 2
PHASE
Figure 10. Open-Loop Inverting Input Impedance
Z
I
(s) goes positive real and approaches 1/2 g
mf
as ␻ approaches
(g
mc
冤 R1 – 1)/τ1. This results in the input resistance for the A
V
(s)
complex term being 1/2 g
mf
, the parallel thermal emitter
resistances of Q3/Q4. Using the computed CLBW from A
V
(s)
and the nominal design values for the other parameters, results in
a closed-loop 3 dB BW equal to the open-loop corner frequency
(1/2 πτ1) × 1/[G/(2 g
mf
⫻ T
O
) + R
F
/T
O
]. For a fixed R
F
, the
3 dB BW is controlled by the R
F
/T
O
term for low gains and
G/(2 g
mf
⫻ T
O
) for high gains. For example, using nominal design
parameters and R
1
= 1 kΩ (which results in a nominal T
O
of
1.2 MΩ), the computed BW is 80 MHz for G = 0 (inverting
I-V mode with R
N
removed) and 40 MHz for G = +10/–9.
DRIVING CAPACITIVE LOADS
The AD8011 was designed primarily to drive nonreactive loads.
If driving loads with a capacitive component is desired, the best
settling response is obtained by the addition of a small series
resistance as shown in Figure 11. The accompanying graph shows
the optimum value for R
SERIES
versus capacitive load. It is worth
noting that the frequency response of the circuit when driving
large capacitive loads will be dominated by the passive roll-off
of R
SERIES
and C
L
.
1k⍀
R
L
1k⍀
C
L
R
SERIES
1k⍀
AD8011
Figure 11. Driving Capacitive Load
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

AD8011ARZ-REEL

Mfr. #:
Buy AD8011ARZ-REEL
Manufacturer:
Analog Devices Inc.
Description:
Operational Amplifiers - Op Amps 300MHz 1mA Current Feedback
Lifecycle:
New from this manufacturer.
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